• 대한전기학회논문지:전력기술부문A
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• 제55권8호
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• pp.329-333
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• 2006

We investigated the quench characteristics of a flux-lock type superconducting fault current limiter (SFCL) depending on the number of the serial connection between the superconducting elements at the subtractive polarity winding of a transformer. The flux-lock type SFCL consists of two coils. The primary coil is wound in parallel to the secondary coil through an iron core, and the secondary coil is connected to the superconducting elements in series. The operation of the flux-lock type SFCL can be divided into the subtractive and the additive polarity windings depending on the winding directions between the primary and secondary coils. In this paper, the analyses of voltage, current, and resistance of superconducting elements in serial connection were performed to increase the power capacity of flux-lock type SFCL. The power burden was reduced through the simultaneous quenching between the superconducting elements. This enabled the flux-lock type SFCL to be easy to increase the capacity of power system.

• 한국전기전자재료학회논문지
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• 제18권9호
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• pp.856-862
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• 2005

A flux-lock type SFCL consists of two coils, which are wound in parallel each other through an iron core, and a HTSC thin film connected in series with coil 2. If the current of the HTSC thin film exceeds its critical current by the fault accident, the resistance generated of the HTSC thin film, and thereby the fault current can be limited by the impedance of the flux-lock type SFCL. The amplitude of fault current can be set by the impedance of the flux-lock type SFCL. In this paper, we investigated the variance of the limiting current due to the ratio of inductances between coil 1 and coil 2 in the flux-lock type SFCL through the computer simulations and short circuit tests. In addition, both the simulation results and experimental ones were compared each other. From the comparison of both the results, the simulation results agreed well with the experimental ones.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 A
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• pp.259-261
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• 2000

UPFC(Unified Power Flow Controller) consists of two voltage sourced converter(VSC)s inserted into AC system through series and parallel coupling transformer, where two VSCs are linked by capacitor at DC-side. Since VSC acts as an AC voltage source behind a reactance, where both magnitude and phase angle of the source are controllable, UPFC can be represented by the equation related to input-output relation of two VSCs. Voltage control of DC-link capacitor provides the path of real power flow between two VSCs. While UPFC is controlled for maintaining the given reference value in steady state, it should be controlled for damping power oscillation in dynamics. For such a control objective, the control strategy based on the energy function was proposed and has been shown to be effect and robust for damping power oscillation of power system. In this paper, UPFC model based on the VSC was analysed and applied to power-flow control and stability analysis. The control strategy based on the energy function is adopted for damping power oscillation of power system. The effectiveness of proposed control strategy was verified by simulation study

• 한국전기전자재료학회논문지
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• 제18권4호
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• pp.363-369
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• 2005

we compared the operating characteristics between flux-lock type and resistive type superconducting fault current limiters(SFCLs). Flux-lock type SFCL consists of two coils, which are wound in parallel each other through an iron core, and a high-Tc superconducting(HTSC) element is connected with coil 2 in series. The the flux-lock type SFCL can be divided into the subtractive polarity winding and the additive polarity winding operations according to the winding directions between the coil 1 and coil 2. It was confirmed from experiments that flux-lock type SFCL could improve both the quench characteristics and the transport capacity compared to the resistive type SFCL, which means, the independent operation of HTSC element.

• 대한원격탐사학회:학술대회논문집
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• 대한원격탐사학회 2006년도 Proceedings of ISRS 2006 PORSEC Volume I
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• pp.220-223
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• 2006

The COMS(Communication, Ocean and Meteorological Satellite) EPS(Electrical Power Subsystem) is derived from an enhanced Eurostar 3000 EPS which is fully autonomous operation in normal conditions or in the event of a failure and provides a high level of reconfiguration capability and flexibility. This paper introduces the COMS EPS preliminary design result. The COMS EPS consists of a battery, a solar array wing, a PSR(Power Supply Regulator), a PRU(Pyrotechnic Unit), a SADM(Solar Array Drive Mechanism) and relay and fuse brackets. This can offer a bus power capability of 3 kW. The solar array is made of a deployable wing with two panels. One type of solar cells is selected as GaAs/Ge triple junction cells. Li-ion battery is base lined with ten series cell module of five cells in parallel. PSR associated with battery and solar array generates a power bus fully regulated 50 V. Power bus is centralised protection and distribution by relay and fuse brackets. PRU provides power for firing actuators devices. The solar array wing is routed by the SADM under control of the AOCS(Attitude Orbit Control Subsystem). The control and monitoring of the EPS especially of the battery, is performed by the PSR in combination with on-board software.

• 한국ITS학회 논문지
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• 제8권4호
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• pp.46-52
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• 2009

본 논문에서는 낮은 위상잡음 특성과 넓은 주파수 가변을 갖는 새로운 전압제어 발진기의 구조를 제안한다. 제한한 구조는 서셉턴스 기울기 파라미터를 높이기 위해 임피던스 변환기를 이용하여 직렬 공진 회로를 병렬 공진 회로로 변환하는 방법을 사용하고 있다. 제작한 전압제어발진기는 0V$\sim$9V 가변전압으로 10.1GHz$\sim$10.7GHz의 600MHz 주파수 가변과 -119dBc/Hz@1MHz 이하의 우수한 위상잡음 특성을 보인다. 측정된 고조파 억압특성은 28dB이상이다.

• 전력전자학회논문지
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• 제23권3호
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• pp.190-198
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• 2018

This paper proposes a nonisolated, bidirectional, soft-switching DC - DC converter with PWM plus phase shift (PPS) control. The proposed converter has an input-parallel/output-series configuration and can achieve the interleaving effect and high voltage gains, resulting in decreased voltage ratings in all related devices. The proposed converter can operate under zero-voltage switching (ZVS) conditions for all switches in continuous conduction mode. The power flow of the proposed converter can be controlled by changing the phase shift angle, and the duty is controlled to balance the voltage of four high voltage side capacitors. The PPS control device of the proposed converter is simple in structure and presents symmetrical switching patterns under a bidirectional power flow. The PPS control also ensures ZVS during charging and discharging at all loads and equalizes the voltage ratings of the output capacitors and switches. To verify the validity of the proposed converter, an experimental investigation of a 2 kW prototype is performed in both charging and discharging modes under different load conditions and a bidirectional power flow.

• 한국통신학회논문지
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• 제29권1A호
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• pp.99-106
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• 2004

본 논문에서는 DSSS (Direct Sequence Spread Spectrum) 수신기에서 초기동기 탐색에 사용될 수 있는 정합필터에 대해서 연구하였다. 하드웨어기술언어 (HDL)로 표현될 수 있는 단일 데이터 흐름 경로를 갖는 정합필터가 설명되었다. 필터 연산의 처리시간을 개선하기 위해 데이터의 흐름이 이중으로 표현될 수 있도록 식이 정리되고 이와 연관된 하드웨어 모델이 제시되었다. 제안된 모델은 고속 처리를 위해 병렬처리와 파이프라인을 기반으로 하고 일련의 메모리, 곱셈기, 누산기로 구성된 두 개의 데이터 흐름 경로가 평행하게 배열된 구조이다. 제안된 모델에 대해 성능을 분석하였고 단인 데이터 흐름 경로 구조의 정합필터와 비교하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 A
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• pp.518-520
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• 2004

In these days, there is a demand to develop fault current limiters(FCLs) to reduce excessive fault current and protect electrical equipments which are installed in the transmission and distribution power systems. We considered the resistive superconducting FCLs among the various kinds of FCLs. In this study, in order to develop the resistive superconducting FCL of 6.6kV 200A $3\phi$, we designed the new mask pattern for etching YBCO films by means of numerical analysis method, current limiting experiments and visualization of bubbles in films and investigated dielectric performance of the designed mask by using elecrtostatic numerical analysis method and breakdown experiments. We etched YBCO films by using the newly designed mask, connected the etched films in series and in parallel, and designed the 6.6kV resistive SFCL and then we observed the current limiting characteristics of the SFCL.

• 한국초전도ㆍ저온공학회논문지
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• 제7권1호
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• pp.21-24
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• 2005

The problem of fluctuation-induced digital errors in a rapid single flux quantum (RSFQ) circuit has been very important issue. So in this experiment, we calculated error rate of RSFQ switch in superconductiyity ALU, The RSFQ switch should have a very low error rate in the optimal bias. We prepared two circuits Placed in parallel. One was a 10 Josephson transmission lines (JTLs) connected in series, and the other was the same circuit but with an RSFQ switch placed in the middle of the 10 JTLs. We used a splitter to feed the same input signal to the both circuits. The outputs of the two circuits were compared with an RSFQ XOR to measure the error rate of the RSFQ switch. By using a computerized bit error rate test setup, we measured the bit error rate of 2.18$\times$$10^{12}$ when the bias to the RSFQ switch was 0.398mh that was quite off from the optimum bias of 0.6mA.