• Title/Summary/Keyword: semiconductor devices

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Fabrication of Nanopatterns by Using Diblock Copolymer

  • KANG GIL BUM;KIM SEONa-IL;KIM YONG TAE;KIM YOUNG HHAN;PARK MIN CHUL;KIM SANG JIN;LEE CHANG WOO
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2005.09a
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    • pp.183-187
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    • 2005
  • Thin films of diblock copolymers may be suitable for semiconductor device applications since they enable patterning of ordered domains with dimensions below photolithographic resolution over wafer-scale area. We obtained nanometer-scale cylindrical structure of dibock copolymer of polystyrene-block-poly(methylmethacrylate), PS-b-PMMA, also demonstrate pattern transfer of the nanoporous polymer using both reactive ion etching. The size of fabricated naonoholes were about 10 nm. Fabricated nanopattern surface was observed by field emission scanning electron microscope (FESEM).

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Effects of Ohmic Area Etching on Buffer Breakdown Voltage of AlGaN/GaN HEMT

  • Wang, Chong;Wel, Xiao-Xiao;Zhao, Meng-Di;He, Yun-Long;Zheng, Xue-Feng;Mao, Wei;Ma, Xiao-Hua;Zhang, Jin-Cheng;Hao, Yue
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.3
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    • pp.125-128
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    • 2017
  • This study is on how ohmic area etching affects the buffer breakdown voltage of AlGaN/GaN HEMT. The surface morphology of the ohmic metal can be improved by whole etching on the ohmic area. The buffer breakdown voltages of the samples with whole etching on the ohmic area were improved by the suppression of the metal spikes formed under the ohmic contact regions during high-temperature annealing. The samples with selective etching on the ohmic area were investigated for comparison. In addition, the buffer leakage currents were measured on the different radii of the wafer, and the uniformity of the buffer leakage currents on the wafer were investigated by PL mapping measurement.

Damage and Failure Characteristics of Semiconductor Devices by ESD (ESD에 의한 반도체소자의 손상특성)

  • 김두현;김상렬
    • Journal of the Korean Society of Safety
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    • v.15 no.4
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    • pp.62-68
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    • 2000
  • Static electricity in electronics manufacturing plants causes the economic loss, yet it is one of the least understood and least recognized effects haunting the industry today. Today's challenge in semiconductor devices is to achieve greater functional density pattern and to miniaturize electronic systems of being more fragile by electrostatic discharges(ESD) phenomena. As the use of automatic handling equipment for static-sensitive semiconductor components is rapidly increased, most manufacturers need to be more alert to the problem of ESD. One of the most common causes of electrostatic damage is the direct transfer of electrostatic charge from the human body or a charged material to the static-sensitive devices. To evaluate the ESD hazards by charged human body and devices, in this paper, characteristics of electrostatic attenuation in domestic semiconductor devices is investigated and the voltage to cause electronic component failures is investigated by field-induced charged device model(FCDM) tester. The FCDM simulator provides a fast and inexpensive test that faithfully represents ESD hazards in plants. Also the results obtained in this paper can be used for the prevention of semiconductor failure from ESD hazards.

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Experimental Investigation of the Electrostatic Discharge(ESD) Damage in Packaged Semiconductor Devices (패키지 반도체소자의 ESD 손상에 대한 실험적 연구)

  • Kim, Sang-Ryull;Kim, Doo-Hyun;Kang, Dong-Kyu
    • Journal of the Korean Society of Safety
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    • v.17 no.4
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    • pp.94-100
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    • 2002
  • As the use of automatic handling equipment for sensitive semiconductor devices is rapidly increased, manufacturers of electronic components and equipments need to be more alert to the problem of electrostatic discharges(ESD). In order to analyze damage characteristics of semiconductor device damaged by ESD, this study adopts a new charged-device model(CDM), field-induced charged model(FCDM) simulator that is suitable for rapid, routine testing of semiconductor devices and provides a fast and inexpensive test that faithfully represents ESD hazards in plants. High voltage applied to the device under test is raised by the field of non-contacting electrodes in the FCDM simulator, which avoids premature device stressing and permits a faster test cycle. Discharge current and time are measured and calculated. The characteristics of electrostatic attenuation of domestic semiconductor devices are investigated to evaluate the ESD phenomena in the semiconductors. Also, the field charging mechanism, the device thresholds and failure modes are investigated and analyzed. The damaged devices obtained in the simulator are analyzed and evaluated by SEM. The results obtained in this paper can be used to prevent semiconductor devices form ESD hazards and be a foundation of research area and industry relevant to ESD phenomena.

Electrical Characteristics of High Voltage IGCT Devices for Rapid Electronic Railway (고속전철용 고전압 IGCT소자의 전기적 특성)

  • Kim, Sang-Cheol;Seo, Kil-Soo;Kim, Hyong-Woo;Kim, Eun-Dong
    • Proceedings of the KIEE Conference
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    • 2003.07c
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    • pp.1556-1558
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    • 2003
  • IGCT devices is a superior devices for power conversion purpose. The basic structure of the IGCT devices is same as that of GTO thyristor. This makes the blocking voltage higher and controllable on-state current higher. In this paper, we present static and dynamic characteristics of 4.5 kV PT-type IGCT devices as a function of minority carrier lifetime, n-base thickness and n-buffer thickness. We should choose proper structural parameters for good electrical characteristics of GCT devices.

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