• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1892-1897
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• 2003

A new thermal inkjet printer head on SOI wafer with virtual valve was proposed. It was composed of two rectangular heaters with same size. So we could call it T-jet(Twin jet). T-jet has a lot of merits. It has the advantage of being fabricated with one wafer and is easy to change the size of chamber, nozzle, restrictor and so on. However, above all, It is the best point that T-jet has a virtual valve. And it was manufactured on SOI wafer. The chamber was formed in its upper silicon whose thickness was 40um. The chamber's bottom layer was silicon dioxide of SOI wafer and two heaters were located underneath the chamber's ceiling. And the restirctor was made beside the chamber. Nozzle was molded by process of Ni plating. Ni was 30um thick. Nozzle ejection test was performed by printer head having 56 nozzles in 2 columns with 600NPI(nozzle per inch) and black ink. It measured a drop velocity of 12m/s, a drop volume of 30pl, and a maximum firing frequency of 12KHz for single nozzle ejection. Throwing out the ink drop in whole nozzles at the same time, it was observed that the uniformity of the drop velocity and volume was less than 4%.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.180-184
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• 2013

In this paper, a low power antenna switch controller IC is designed using a silicon-on-insulator (SOI) CMOS technology. To improve power handling capability and harmonic distortion performance of the antenna switch, the proposed antenna switch controller provides 3-state logic level such as +VDD, GND, and -VDD for the gate and body of switch of FETs according to decoder signal. By employing input-coupled current ring oscillator and hardware efficient level shifter, the proposed controller greatly reduces power consumption and hardware complexity. It consumes 135 ${\mu}A$ at a 2.5 V supply voltage in active mode, and occupies $1.3mm{\times}0.5mm$ in area. In addition, it shows fast start-up time of 10 ${\mu}s$.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.26 no.4B
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• pp.355-362
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• 2006

Several techniques of MK test, Spearman's Rho test, Linear Regression test, CUSUM test, Cumulative Deviation, Worsley Likelihood Ratio test, Rank Sum test, and Students' t test were applied to detect the trends of slope and shift which exist in hydrologic and climate time series. The time series of annual rainfall, inflow, tree ring index, and southern oscillation index (SOI) were used and the trends of these series were compared in the study. From the results, it can be found that the data could be classified into two categories such as linear trend and shift. 4 series data of 8 rainfall series which reveal the trend show the shift and 8 series data of 18 tree ring index and March and April series of monthly SOI data show shift. Moreover, ADF test and BDS test were used to test stationarity and non-linearity of the data. In conclusion, through the study, various trend analysis techniques were compared and 6 kinds of characteristics which can exist in hydrologic time series were identified.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.156-157
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• 2012

단일 셀에서 비휘발성 및 고속의 휘발성 메모리를 모두 구동할 수 있는 다기능 메모리는 모바일 기기 및 embedded 장치의 폭발적인 성장에 있어 그 중요성이 커지고 있다. 따라서 최근 이러한 fusion기술을 응용한 unified RAM (URAM)과 같은 다기능 메모리의 연구가 주목 받고 있다. 이러한 다목적 메모리는 주로 silicon on insulator (SOI)기반의 1T-DRAM과 SONOS기술 기반의 비휘발성 메모리의 조합으로 이루어진다. 하지만 이런 다기능 메모리는 주로 단결정기반의 SOI wafer 위에서 구현되기 때문에 값이 비싸고 사용범위도 제한되어 있다. 따라서 이러한 다기능메모리를 다결정 실리콘을 이용하여 제작한다면 기판에 자유롭게 메모리 적용이 가능하고 추후 3차원 적층형 소자의 구현도 가능하기 때문에 다결정실리콘 기반의 메모리 구현은 필수적이라고 할 수 있겠다. 본 연구에서는 다결정실리콘을 이용한 channel recessed구조의 다기능메모리를 제작하였으며 각 1T-DRAM 및 NVM동작에 따른 memory 특성을 살펴보았다. 실험에 사용된 기판은 상부 비정질실리콘 100 nm, 매몰산화층 200 nm의 SOI구조의 기판을 이용하였으며 고상결정화 방법을 이용하여 $600^{\circ}C$ 24시간 열처리를 통해 결정화 시켰다. N+ poly Si을 이용하여 source/drain을 제작하였으며 RIE시스템을 이용하여 recessed channel을 형성하였다. 상부 ONO게이트 절연막은 rf sputter를 이용하여 각각 5/10/5 nm 증착하였다. $950^{\circ}C$ N2/O2 분위기에서 30초간 급속열처리를 진행하여 source/drain을 활성화 하였다. 계면상태 개선을 위해 $450^{\circ}C$ 2% H2/N2 분위기에서 30분간 열처리를 진행하였다. 제작된 Poly Si MFM에서 2.3V, 350mV/dec의 문턱전압과 subthreshold swing을 확인할 수 있었다. Nonvolatile memory mode는 FN tunneling, high-speed 1T-DRAM mode에서는 impact ionization을 이용하여 쓰기/소거 작업을 실시하였다. NVM 모드의 경우 약 2V의 memory window를 확보할 수 있었으며 $85^{\circ}C$에서의 retention 측정시에도 10년 후 약 0.9V의 memory window를 확보할 수 있었다. 1T-DRAM 모드의 경우에는 약 $30{\mu}s$의 retention과 $5{\mu}A$의 sensing margin을 확보할 수 있었다. 차후 engineered tunnel barrier기술이나 엑시머레이저를 이용한 결정화 방법을 적용한다면 device의 특성향상을 기대할 수 있을 것이다. 본 논문에서는 다결정실리콘을 이용한 다기능메모리를 제작 및 메모리 특성을 평가하였다. 제작된 소자의 단일 셀 내에서 NVM동작과 1T-DRAM동작이 모두 가능한 것을 확인할 수 있었다. 다결정실리콘의 특성상 단결정 SOI기반의 다기능 메모리에 비해 낮은 특성을 보여주었으나 이는 결정화방법, high-k절연막 적용 및 engineered tunnel barrier를 적용함으로써 해결 가능하다고 생각된다. 또한 sputter를 이용하여 저온증착된 O/N/O layer에서의 P/E특성을 확인함으로써 glass위에서의 MFM구현의 가능성도 확인할 수 있었으며, 차후 system on panel (SOP)적용도 가능할 것이라고 생각된다.

• Journal of Sensor Science and Technology
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• v.16 no.2
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• pp.126-131
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• 2007

In this paper, we fabricated piezoresistive pressure sensor with dry etching technology which used ICP-RIE (inductively coupled plasma reactive ion etching) and etching delay technology which used SOI (silicon-on-insulator). Structure of the fabricated pressure sensor shows a square diaphragm connected to a frame which was vertically fabricated by dry etching process and a single-element four-terminal gauge arranged at diaphragm edge. Sensitivity of the fabricated sensor was about 3.5 mV/V kPa at 1 kPa full-scale. Measurable resolution of the sensor was not exceeding 20 Pa. The nonlinearity of the fabricated pressure sensor was less than 0.5 %F.S.O. at 1 kPa full-scale.

• Proceedings of the Korea Water Resources Association Conference
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• 2006.05a
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• pp.1474-1478
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• 2006

본 연구에서는 여러 기상지수들과 우리나라 기온, 강수량에 대해서 Multi-Channel Singular Spectrum Analysis(MSSA)를 실시함으로써 상호영향에 따른 주성분을 분석하였다. Window length가 150일 때 SOI 등의 기상지수와 기온, 강수량의 MSSA를 실시하였으며 이 때 각각의 eigenvalue는 전체 공분산에 대한 각 요소의 비율을 설명한다. Window length는 Vautard 등(1992)이 제시한 $N/5{\sim}N/3$의 값을 사용하였다. 기상요소들과 기온, 강수량의 MSSA를 이용한 기후변화에 따른 국내 수문변수의 변화 상관분석은 기온과 각 기상요소들과의 분석결과에 비해 강수와 각 기상요소들의 분석결과가 기상요소들에 대한 주기패턴을 잘 따르지 못하고 약한 진폭을 나타내며 특히 SOI와 Rainfall의 경우 첫 번째 주성분에서의 상관분석결과 3개월 지체 시 상관계수 0.8410의 상관성이 높은 장주기 변화 쌍을 가짐에도 불구하고 자료의 변화도에 대하여 각 요소가 설명하는 비중이 매우 낮았다.

• Journal of Power System Engineering
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• v.5 no.2
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• pp.36-42
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• 2001

This paper deals with finite element analyses of residual stresses causing popping up which are induced in micromachining processes of a microaccelerometer sensors. The paddle of the micro accelerometer sensor is designed symmetric with respect to the direction of the beam. After heating the tunnel gap up to 100 degree and get it through the cooling process and the additional beam up to 80 degree and get it through the cooling process. We learn the thermal internal stresses of each shape and compare the results with each other, after heating the tunnel gap up to 400 degree during the Pt deposition process. Finally we find the optimal shape which is able to minimize the internal stresses of microaccelerometer sensor. We want to seek after the real cause of this pop up phenomenon and diminish this by change manufacturing processes of microaccelerometer sensor by electrostatic force.

• Journal of Environmental Science International
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• v.21 no.2
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• pp.125-133
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• 2012

Climatological trend for the period of 1970 to 2009 in sea water temperature around the Antarctic Peninsular waters in the Southern Ocean was investigated. During the period from 1970 to 2009, sea water temperature in the top 500 m water column except 100 m increased at a rate of $0.003-0.011^{\circ}C{\cdot}yr^{-1}$, but at 100 m it decreased at a rate of $-0.003^{\circ}C{\cdot}yr^{-1}$. Although long-term trend is generally warming, there were several periods of sharp changes between 1970 and 2009. Annual mean sea water temperature between surface and 500 m except 100 m decreased from the early of 1970s to the end of 1980s, and then it increased to the end of 2000s. In the entire water column between the surface and 500 m, sea water temperature closely correlated with the El Nino events expressed as the Southern Oscillation Index(SOI), and SOI and sea water temperature have a dominant period of about 3-5 years and decade.

• Journal of Sensor Science and Technology
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• v.9 no.1
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• pp.1-8
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• 2000

One of today's very critical and sensitive accurate accelerometer which can be used higher temperature than $200^{\circ}C$ and corrosive environment, is particularly demanded for automotive engine. Because silicon is a material of large temperature dependent coefficient, and the piezoresistors are isolated with p-n junctions, and its leakage current increase with temperature, the performance of the silicon accelerometer degrades especially after $150^{\circ}C$. In this paper, The temperature characteristic of a accelerometer using silicon on insulator (SOI) structure is studied theoretically, and compared with experimental results. The temperature coefficients of sensitivity and offset voltage (TCS and TCO) are related to some factors such as thermal residual stress, and are expressed numerically. Thermal stress analysis of the accelerometer has also been carried out with the finite-element method(FEM) simulation program ANSYS. TCS of this accelerometer can be reduced to control the impurity concentration of piezoresistors, and TCO is related to factors such as process variation and thermal residual stress on the piezoresistors. In real packaging, The avarage thermal residual stress in the center support structure was estimated at around $3.7{\times}10^4Nm^{-2}^{\circ}C^{-1}$ at sensing resistor. The simulated ${\gamma}_{pT}$ of the center support structure was smaller than one-tenth as compared with that of the surrounding support structure.

• Journal of the Korean Vacuum Society
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• v.10 no.3
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• pp.361-367
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• 2001

Recently, Chemical Mechanical Polishing(CMP) has become a leading planarization technique as a method for silicon wafer planarization that can meet the more stringent lithographic requirement of planarity for the future submicron device manufacturing. The SOI(Silicon On Insulator) wafer has received considerable attention as bulk-alternative wafer to improve the performance of semiconductor devices. In this paper, the objective of study is to investigate Material Removal Rate(MRR) and surface micro-roughness effects of slurry and pad in the CMP process. When particle size of slurry is increased, Material Removal rate increase. Surface micro-roughness is greater influenced by pad than by particle size of slurry. As a result of AM measurement, surface micro-roughness was improved from 27 $\AA$ Rms to 0.64 $\AA$Rms.