• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.270-275
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• 1998

A new single phase power factor correction rectifier/regulator with dc linked energy feedback circuit is proposed, which is capable of achieving the zero voltage switching (ZVS) of a boost rectifier stage without any auxiliary switch. The performance of the proposed rectifier/regulator is demonstrated through a 200W, 90 KHz prototype. This proposed rectifier/regulator with dc linked energy feedback circuit is particularly suited for distributed power system applications

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.721-724
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• 2002

This study deals with a dynamic behavior analysis of pump control regulator varied the swash plate tilting angle with the positive and negative direction. To accomplish it's purpose, modeling and displacement response analysis about principal parts (spool, servo piston, feedback lever, sleeve) of pump control regulator was performed. We have been able to verifying the propriety of servo mechanism and design parameters of pump control regulator by research results. So, it respect to utilized with useful research data at variable displacement control valve development of variable displacement piston pump.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.810-817
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• 2014

An on-chip current sensor with fast response time for the peak-current-mode buck regulator is proposed. The initial operating points of the peak current sensor are determined in advance by the valley current level, which is sensed by a valley current sensor. As a result, the proposed current sensor achieves a fast response time of less than 20 ns, and a sensing accuracy of over 90%. Applying the proposed current sensor, the peak-current-mode buck regulator for the mobile application is realized with an operating frequency of 2 MHz, an output voltage of 0.8 V, a maximum load current of 500 mA, and a peak efficiency of over 83%.

• Journal of IKEEE
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• v.21 no.3
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• pp.264-267
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• 2017

In this paper, A low dropout (LDO) regulator that improves the power supply rejection ratio by using a noise canceling circuit is proposed. The noise rejection circuit between the error amplifier and the pass transistor is designed to reduce the influence of the pass transistor on the noise coming from the voltage source. The LDO regulator has the same regulation characteristics as the conventional LDO regulator. The proposed circuit uses 0.18um process and Cadence's Virtuoso and Specter simulator.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.11
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• pp.1641-1646
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• 2013

Control voltage for baseband channel selection filter to select one of communication channels can be easily fluctuated according to external noise or variation of fabrication. In this paper, we design a voltage regulator with small chip area to keep control voltage constantly using current comparative method. Cut-off frequency of channel selection filter is automatically controlled by detecting current flow using the proposed voltage regulator.

• Journal of Electrical Engineering and Technology
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• v.7 no.6
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• pp.911-917
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• 2012

In this paper, a digital speed regulator system design method is developed for a permanent magnet synchronous motor (PMSM). Firstly, an accurate approximate discrete-time model is proposed for a PMSM considering its inherent nonlinearities. Based on the discrete-time model, a digital acceleration observer as well as a digital speed regulator is designed. The exponential stability of the augmented control system is analyzed. The proposed digital speed regulator system is implemented by using a TMS320F28335 floating point DSP. Simulation and experimental results are given to verify the effectiveness of the proposed method.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.353-354
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• 2014

본 논문은 대기전력저감 및 정확한 출력전압 제어가 가능한 새로운 방식의 SSR(Secondary Side Regulator) 회로를 제안한다. 제안방식은 기존의 1차 측 IC를 2차 측으로 옮김으로써 기존의 SSR의 장점인 정확한 출력전압의 제어가 가능하다는 점과 포토커플러 및 TL431을 사용하지 않는 방식이므로 대기전력저감 측면에 있어 유리한 장점을 갖는다. 또한 절연된 1-2차 측간 신호전송방법에 있어 사이즈가 작고 가격이 저렴한 CT(Current Transformer)를 사용하여 Pulse edge의 전달을 통해 제어를 한다. 제안회로의 타당성 검증을 위하여 이론적 해석과 10W 급 플라이백 컨버터의 실험결과를 통해 증명하였다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.8
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• pp.1383-1391
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• 2016

This paper is concerned with applicability of a new type of controllers, called i-PID and GPI in which unknown parts of the plant are taken into account without any modeling procedure, to automatic voltage regulator (AVR) system. First, the procedure for applying i-PID and GPI algorithms to AVR system is proposed, which uses model reduction technique based on the given information of AVR. Second, simulations are given to verify their effectiveness comparing to various PID algorithms including PIDD2 which is four-term controller, that is, consisting of PID and second order derivative terms. Superior response performances of i-PID and GPI in comparison to conventional PID controllers are shown. Moreover, i-PID can highly improve the system robustness with respect to model uncertainties, especially to load variations.

• Journal of Power Electronics
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• v.19 no.1
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• pp.34-43
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• 2019

An improved half-bridge LLC converter with a magamp auxiliary post-regulator is proposed in this paper. The function of the magamp is bypassed when the converter works within the low input-voltage range. Meanwhile, it operates as an auxiliary post-regulator when the input voltage is high. By changing the blocking time of the magamp, the dc gain of the converter can be extended. Hence, the input voltage range of the converter is extended. The realization of proposed topology does not require a complicated circuit. The controller of the magamp can be easily implemented using only passive components, transistors and an OP amp. The generalized operational principle is analyzed and the design criterion for the magamp is presented. Finally, a 25V output, 400W experimental prototype was built and tested for a 160-300V input-voltage range to verify the feasibility of the proposed method.

• Journal of IKEEE
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• v.24 no.4
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• pp.1162-1166
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• 2020

In this paper Low Drop-Out (LDO) regulator that improved load regulation characteristics due to the feedback detection structure. The proposed feedback sensing circuit is added between the output of the LDO's internal error amplifier and the input of the pass transistor to improve the regulation of the delta value coming into the output. It has a voltage value with improved load regulation characteristics than existing LDO regulator. The proposed LDO structure was analyzed in Samsung 0.13um process using Cadence's Virtuoso, Spectre simulator.