• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.569_570
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• 2009

This paper presents a methodology to find the profit maximized Nash Equilibriums of each generator(or GenCo), which considers the Ramp-rate of each generator under a competitive market environment. The ramp-rate of a generator is one of the physical or technical constraints of a generator and means the ability to increase or decrease the output instantaneously. In this paper, we found several Nash Equilibriums of the generation allocation problem through Dynamic Programming in a competitive market. Individual generators participate in a game to maximize its profit through competitions and play a game with bidding strategies of its generation quantities in a spot market.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.3
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• pp.509-516
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• 2011

This paper studies a novel method to find the profit-maximizing Nash Equilibriums in allocating generation quantities with consideration of ramp-rates under competitive market environment. Each GenCo in a market participates in a game to maximize its profit through competitions and play a game with bidding strategies. In order to find the Nash equilibriums it is necessary to search the feasible combinations of GenCos' strategies which satisfy every participant's profit and no one wants various constraints. During the procedure to find Nash equilibriums, the payoff matrix can be simplified as eliminating the dominated strategies. in each time interval. Because of the ramp-rate, generator's physically or technically limits to increase or decrease outputs in its range, it can restrict the number of bidding strategies of each generator at the next stage. So in this paper, we found the Nash Equilibriums for multi-stage generation allocation game considering the ramp-rate limits of generators. In the case studies, we analyzed the generation allocation game for a 12-hour multi-stage and compared it with the results of dynamic economic dispatch. Both of the two cases were considered generator's ramp-rate effects.

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.38-45
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• 2007

A new 8-bit single-slope ADC using analog RAMP generator with digitally controllable dynamic range has been proposed and simulated for column level or per-pixel CMOS image sensor application. The conversion gain of ADC can he controlled easily by using frequency divider with digitally controllable diviber ratio, coarse/fine RAMP with class-AB op-amp, resistor strings, decoder, comparator, and etc. The chip area and power consumption can be decreased by simplified analog circuits and passive components. Proposed frequency divider has been implemented and verified with 0.65um, 2-poly, 2-metal standard CMOS process. And the functional verification has been simulated and accomplished in a 0.35$\mu$m standard CMOS process.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.06a
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• pp.293-298
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• 2005

The following is final report for governor upgrade for PWR NPP safety related EDG Kori NPP No.2 Unit. The upgraded system includes more beneficial function like as "Slow start with starting ramp", "Generator load sensing & control capability" and "Emergency ramp during slow start". This paper show functional operation of slow start regime according to NRC regulatory guide which guide regulation to NPP safety related environment.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.59-64
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• 2006

The slope of the ramp generator in a single slope ADC(analog-to-digital converter) suffers from process and frequency variation. This variation in ramp slope causes ADC gain variation and eventually limits the performance of the ISP(image signal processing) in a CIS(CMOS image sensor) that uses the single slope ADC. This paper proposes a ramp slope BISC(built-in-self-calibration) scheme for CIS. The CIS with proposed BISC was fabricated with a $0.35{\mu}m$ process. The measurement results show that the proposed architecture effectively calibrate the ramp slope against process and clock frequency variation. The silicon area overhead is less than $0.7\%$ of the full chip area.

• Journal of Sensor Science and Technology
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• v.24 no.4
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• pp.252-257
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• 2015

This paper proposes a single slope A/D converter (SSADC) that is possible to process the signal of the ultraviolet, visible and infrared rays with a single chip. And the proposed SSADC is a type of single channel ADC. In the conventional SSADC, it is possible to process the only one signal with a kind of the sensor because the speed of the operating frequency and the slope of ramp signal generated by the ramp generator are fixed. In order to improve the disadvantages, a ramp generator which has variable slope in ramp function is designed and $3{\times}1$ MUX(multiplexer) is adopted so that we can change the speed of the operating frequency and the slope of ramp signal. Therefore, the multiple signal processing of the wanted sensors can be possible. The designed circuit is layout by the $0.35-{\mu}m$ CMOS 2-poly 4-metal technology process and is checked through DRC and LVS tools.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.13-21
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• 2010

A energy efficient $V_{pp}$ generator using a variable pumping frequency for mobile DRAM is presented in this paper. The proposed $V_{pp}$ generator exploits 3 stages of a cross-coupled charge pump for energy efficiency. Instead of using a fixed pumping frequency in the conventional $V_{pp}$ generator, our proposed $V_{pp}$ generator adopts a voltage-controlled oscillator and uses variable frequencies to reduce the ramp-up time. As a result, our $V_{pp}$ generator generates 3.0 V output voltage with 24.0-${\mu}s$ ramp-up time at 2 mA current load and 1 nF capacitor load with 1.2 V supply voltage. Experimental results show that the proposed $V_{pp}$ generator consumes around 26% less energy (1573 nJ $\rightarrow$ 1162 nJ) and reduces 29% less ramp-up time (33.7-${\mu}s$ $\rightarrow$ 24.0-${\mu}s$) compared to the conventional approach.

• Journal of Electrical Engineering and Technology
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• v.3 no.3
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• pp.320-330
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• 2008

This paper presents an improved dynamic programming (IDP) approach to solve the economic power dispatch problem including transmission losses in power systems. A detailed mathematical derivation of recursive dynamic programming approach for the economic power dispatch problem with transmission losses is presented. The transmission losses are augmented with the objective function using price factor. The generalized expression for optimal scheduling of thermal generating units derived in this article can be implemented for the solution of the economic power dispatch problem of a large-scale system. Six-unit, fifteen-unit, and forty-unit sample systems with non-linear characteristics of the generator, such as ramp-rate limits and prohibited operating zones are considered to illustrate the effectiveness of the proposed method. The proposed method results have been compared with the results of genetic algorithm and particle swarm optimization methods reported in the literature. Test results show that the proposed IDP approach can obtain a higher quality solution with better performance.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.581-583
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• 2005

The paper is final report for speed control upgrade and analysis report which recently performed on PWR NPP safety related EDG KHNP Ulchin NPP No.2 Unit. The upgraded system includes more beneficial function like as 'Slow start with starting ramp', 'Generator load sensing & control capability' and 'Emergency ramp during slow start'. This paper shows functional operation of slow start regime according to NRC regulatory guide which guide regulation to NPP safety related environment.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.254-259
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• 2014

In this paper, we describe construction of a wind stabilization demo-site and effects of output power control of wind turbines for suppression of ramp rate using ESS (Energy Storage System). It is difficult to control the output power of distributed generator such as wind turbine which of variation is very large. If the large capacity wind farm be interconnected into power system may cause blackout due to Power Quality. For these reasons, the international standards such as Grid-Code is limited to less than 10 [%/min] of renewable energy ramp rate. The case of Korea, government actively conducts propagating large-scale renewable energy for green growth policy, to interconnecting more renewable energy into power system is necessary for stabilization technology. For these reasons, the POSCO consortium has constructed a wind stabilization demo-site that is configured as 500 [kWh] battery energy storage systems can output up to 3 [C-Rate] and two wind turbines rated 750 [kW]. In POSCO consortium, which implements various methods stabilizing output power of wind turbine such as smoothing, section firming and ramp control, we derive the results of long-term demonstration that can be controlled to satisfy to the international standard about ramp rate [%/kW] of wind turbine output power.