• Title/Summary/Keyword: radio frequency thin-film transistors

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Transferrable single-crystal silicon nanomembranes and their application to flexible microwave systems

  • Seo, Jung-Hun;Yuan, Hao-Chih;Sun, Lei;Zhou, Weidong;Ma, Zhenqiang
    • Journal of Information Display
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    • v.12 no.2
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    • pp.109-113
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    • 2011
  • This paper summarizes the recent fabrication and characterizations of flexible high-speed radio frequency (RF) transistors, PIN-diode single-pole single-throw switches, as well as flexible inductors and capacitors, based on single-crystalline Si nanomembranes transferred on polyethylene terephthalate substrates. Flexible thin-film transistors (TFTs) on plastic substrates have reached RF operation speed with a record cut-off/maximum oscillation frequency ($f_T/f_{max}$) values of 3.8/12 GHz. PIN diode switches exhibit excellent ON/OFF behaviors at high RF frequencies. Flexible inductors and capacitors compatible with high-speed TFT fabrication show resonance frequencies ($f_{res}$) up to 9.1 and 13.5 GHz, respectively. Robust mechanical characteristics were also demonstrated with these high-frequency passives components.

Stability of an Amorphous Silicon Oscillator

  • Bae, Byung-Seong;Choi, Jae-Won;Kim, Se-Hwan;Oh, Jae-Hwan;Jang, Jin
    • ETRI Journal
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    • v.28 no.1
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    • pp.45-50
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    • 2006
  • An RC oscillator using amorphous silicon thin film transistors was developed. The oscillation frequency and its dependence on resistance and bias voltage were studied. The frequency was controlled by adjusting the feedback resistance of the oscillator. The highest measured frequency of the oscillator was around 140 kHz, which is acceptable for low-end radio frequency identification (RFID). Since a low-end RFID circuit needs low cost and a simple process, an amorphous silicon oscillator is suitable.

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Effect of Annealing Temperature on the Electrical Performance of SiZnSnO Thin Film Transistors Fabricated by Radio Frequency Magnetron Sputtering

  • Kim, Byoungkeun;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.1
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    • pp.55-57
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    • 2017
  • Amorphous oxide thin film transistors (TFTs) were fabricated with 0.5 wt% silicon doped zinc tin oxide (a-0.5SZTO) thin film deposited by radio frequency (RF) magnetron sputtering. In order to investigate the effect of annealing treatment on the electrical properties of TFTs, a-0.5SZTO thin films were annealed at three different temperatures ($300^{\circ}C$, $500^{\circ}C$, and $700^{\circ}C$ for 2 hours in a air atmosphere. The structural and electrical properties of a-0.5SZTO TFTs were measured using X-ray diffraction and a semiconductor analyzer. As annealing temperature increased from $300^{\circ}C$ to $500^{\circ}C$, no peak was observed. This provided crystalline properties indicating that the amorphous phase was observed up to $500^{\circ}C$. The electrical properties of a-0.5SZTO TFTs, such as the field effect mobility (${\mu}_{FE}$) of $24.31cm^2/Vs$, on current ($I_{ON}$) of $2.38{\times}10^{-4}A$, and subthreshold swing (S.S) of 0.59 V/decade improved with the thermal annealing treatment. This improvement was mainly due to the increased carrier concentration and decreased structural defects by rearranged atoms. However, when a-0.5SZTO TFTs were annealed at $700^{\circ}C$, a crystalline peak was observed. As a result, electrical properties degraded. ${\mu}_{FE}$ was $0.06cm^2/Vs$, $I_{ON}$ was $5.27{\times}10^{-7}A$, and S.S was 2.09 V/decade. This degradation of electrical properties was mainly due to increased interfacial and bulk trap densities of forming grain boundaries caused by the annealing treatment.

Effect of Pressure and Temperature on Al-doped Zinc Oxide Thin Films Deposited by Radio Frequency Magnetron Sputtering

  • Kang, Junyoung;Park, Hyeongsik;Yi, Junsin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.169-169
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    • 2016
  • In this paper, we report electrical, optical and structural properties of Al-doped zinc oxide (AZO) thin films deposited at different substrate temperatures and pressures. The films were prepared by radio frequency (RF) magnetron sputtering on glass substrates in argon (Ar) ambient. The X-ray diffraction analysis showed that the AZO films deposited at room temperature (RT) and 20 Pa were mostly oriented along a-axis with preferred orientation along (100) direction. There was an improvement in resistivity ($3.7{\times}10^{-3}{\Omega}-cm$) transmittance (95%) at constant substrate temperature (RT) and working pressure (20 Pa) using the Hall-effect measurement system and UV-vis spectroscopy, respectively. Our results have promising applications in low-cost transparent electronics, such as the thin-film solar cells and thin-film transistors due to favourable deposition conditions. Furthermore our film deposition method offers a procedure for preparing highly oriented (100) AZO films.

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Influence of Channel Thickness Variation on Temperature and Bias Induced Stress Instability of Amorphous SiInZnO Thin Film Transistors

  • Lee, Byeong Hyeon;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.1
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    • pp.51-54
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    • 2017
  • TFTs (thin film transistors) were fabricated using a-SIZO (amorphous silicon-indium-zinc-oxide) channel by RF (radio frequency) magnetron sputtering at room temperature. We report the influence of various channel thickness on the electrical performances of a-SIZO TFTs and their stability, using TS (temperature stress) and NBTS (negative bias temperature stress). Channel thickness was controlled by changing the deposition time. As the channel thickness increased, the threshold voltage ($V_{TH}$) of a-SIZO changed to the negative direction, from 1.3 to -2.4 V. This is mainly due to the increase of carrier concentration. During TS and NBTS, the threshold voltage shift (${\Delta}V_{TH}$) increased steadily, with increasing channel thickness. These results can be explained by the total trap density ($N_T$) increase due to the increase of bulk trap density ($N_{Bulk}$) in a-SIZO channel layer.

Pressure Dependency of Electrical Properties of In-free SiZnSnO Thin Film Transistors (공정 압력에 따라 제작되어진 비인듐계 SiZnSnO 박막을 이용한 박막트랜지스터의 성능 연구)

  • Lee, Sang-Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.8
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    • pp.580-583
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    • 2012
  • The dependency of processing pressure on the electrical performances in amorphous silicon-zinc-tin-oxide thin film transistors (SZTO-TFT) has been investigated. The SZTO channel layers were deposited by using radio frequency (RF) magnetron sputtering method with different partial pressure. The field effect mobility (${\mu}_{FE}$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing pressure during deposition processing. As a result, oxygen vacancies generated in SZTO channel layer with increasing partial pressure resulted in negative shift in $V_{th}$ and increase in on-current.

Structural and Electrical Properties of a-axis ZnO:Al Thin Films Grown by RF Magnetron Sputtering

  • Bong, Seong-Jae;Kim, Seon-Bo;An, Si-Hyeon;Park, Hyeong-Sik;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.329.1-329.1
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    • 2014
  • In this paper, we report electrical, optical and structural properties of Al-doped zinc oxide (AZO) thin films deposited at different substrate temperatures and pressures. The films were prepared by radio frequency (RF) magnetron sputtering on glass substrates in argon (Ar) ambient. The X-ray diffraction analysis showed that the AZO films deposited at room temperature (RT) and 20 Pa were mostly oriented along a-axis with preferred orientation along (100) direction. There was an improvement in resistivity ($3.7{\times}10^{-3}{\Omega}-cm$) transmittance (95%) at constant substrate temperature (RT) and working pressure (20 Pa) using the Hall-effect measurement system and UV-vis spectroscopy, respectively. Our results have promising applications in low-cost transparent electronics, such as the thin-film solar cells and thin-film transistors due to favourable deposition conditions. Furthermore our film deposition method offers a procedure for preparing highly oriented (100) AZO films.

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Hybrid complementary circuits based on organic/inorganic flexible thin film transistors with PVP/Al2O3 gate dielectrics

  • Kim, D.I.;Seol, Y.G.;Lee, N.E.;Woo, C.H.;Ahn, C.H.;Ch, H.K.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.479-479
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    • 2011
  • Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

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Low-temperature crystallization of high-dielectric (Ba,Sr)$TiO_3$ thin films for embedded capacitors

  • Cho, Kwang-Hwan;Kang, Min-Gyu;Kang, Chong-Yun;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03a
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    • pp.21-21
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    • 2010
  • (Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

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A Transparent Logic Circuit for RFID Tag in a-IGZO TFT Technology

  • Yang, Byung-Do;Oh, Jae-Mun;Kang, Hyeong-Ju;Park, Sang-Hee;Hwang, Chi-Sun;Ryu, Min Ki;Pi, Jae-Eun
    • ETRI Journal
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    • v.35 no.4
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    • pp.610-616
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    • 2013
  • This paper proposes a transparent logic circuit for radio frequency identification (RFID) tags in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technology. The RFID logic circuit generates 16-bit code programmed in read-only memory. All circuits are implemented in a pseudo-CMOS logic style using transparent a-IGZO TFTs. The transmittance degradation due to the transparent RFID logic chip is 2.5% to 8% in a 300-nm to 800-nm wavelength. The RFID logic chip generates Manchester-encoded 16-bit data with a 3.2-kHz clock frequency and consumes 170 ${\mu}W$ at $V_{DD}=6$ V. It employs 222 transistors and occupies a chip area of 5.85 $mm^2$.