• Journal of Advanced Marine Engineering and Technology
• /
• v.28 no.6
• /
• pp.972-980
• /
• 2004

Cathodic protection is being widely used to protect steel structures in sea water environment, In order to protect steel structures completely, the flow condition of sea water surrounding with this structures and the surface condition of the structures must be considered for a desirable design of cathodic protection. In this study, the optimum protection potential and current density were investigated in terms of cathodic current density, surface condition and a flow condition of sea water. The optium protection potential of the cleaned specimen was -770 mV(SCE) and below. However in the case of the rusted specimen, its potential was -700 mV(SCE) and below, which was somewhat positive than the cleaned one irrespective of flow condition. The optimum cathodic protection current density for both the cleaned and rusted specimens was 100 mA/$\textrm{m}^2$, however, on the flow condition, 200 mA/$\textrm{m}^2$ to be supplied for cathodic protection of steel structures completely for both cleaned and rusted specimens.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.64 no.12
• /
• pp.1818-1823
• /
• 2015

In this paper, we analyzed the optimal configuration of protection wire that have been installed in the electric railway power supply system. Protection wires are to suppress the ground potential rise when the short circuit fault between contact wire-rail(C-F), and protect the electronics equipments(signalling and communication) that are facility the wayside. The role of protection wires must be feed back quickly the fault current to the substation when a short circuit fault occurs. In this paper, we proposed that only one line to install the protection wire. Comparing how to newly proposed and existing system, most of the performance is similar. The reason is that most of the current flowing in the protection wire near the location where the fault occurred. There is no problem even if in one line for human safe and the low impedance of the return circuit in dimension to ensure the safety of the facility during the fault. To ensure safety during an fault occurs, it is sufficient even by one line. But, In the protection wire of facilities planning it is necessary to design taking into account the potential utility.

• Proceedings of the Korea Institute of Fire Science and Engineering Conference
• /
• 2008.11a
• /
• pp.310-315
• /
• 2008

The objective of design for a post flash-over fire is contain the fire and prevent structural collapse, as necessary to meet the performance requirements. In the post flash-over phase of a fire all of the combustible objects in the compartment are burning and the heat release rate is limited either by the fuel surface area or the available air supply. So for the PBD situations, the process of evaluation method for fire phenomena is very important. It is the aim of this study to investigate and analyze the evaluation method of structural fire resistance in Japan.

• Proceedings of the KSME Conference
• /
• 2007.05a
• /
• pp.678-682
• /
• 2007

It is conducted that study on corner crack protection for various thermal environment in a flat panel display. Most of the consumer electronics consist of a plastic and a metal structure. And different properties of materials could cause failure of structural reliability due to the various operating temperatures. Especially for front bezel with thin and slender structure, the effect of temperature is significant, and the design for crack protection is crucial for thermal reliability of displays. In this study, it is prescribed the behavior of the front bezel in flat panel display for various operation temperatures and proposed design parameters to ensure the structural reliability of displays.

• ETRI Journal
• /
• v.37 no.1
• /
• pp.97-106
• /
• 2015

In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).

• Proceedings of the KIEE Conference
• /
• 2006.10a
• /
• pp.194-195
• /
• 2006

This study evaluated the impedance characteristics of earth termination system and developed a variable frequency-typed inverter (measuring tool) for the utilization in ground design for lightning protection. The variable-frequency-typed inverter were composed of rectification part, voltage adjuster, IGBT controller and measuring part. Meanwhile, the square wave signal of variable frequency converted its frequency up to lightning surge band by using an IGBT after rectifying an alternating current (AC). It conducted performance evaluation of ground impedance of actual earth termination system by using the developed measuring tool for ground impedance and confirmed that such impedance-oriented performance evaluation was effective in the design of lightning protection.

• Journal of IKEEE
• /
• v.10 no.2 s.19
• /
• pp.141-148
• /
• 2006

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low signal swing range, maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD Phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, The high speed I/O interface circuit with the low triggered ESD protection device in one-chip was designed.

• Proceedings of the Korea Institute of Fire Science and Engineering Conference
• /
• 2012.04a
• /
• pp.393-396
• /
• 2012

신호처리원과 그 방식은 네트웍 구성시 매우 중요하다. 따라서 대단위단지에서 많이 적용되고 있는 자동화재탐지설비의 화재수신기 네트웍과 통신네트웍에 접속시와 수신기에서 발생하는 통신 데이터를 일반 통신네트윅에 접속하여 발생하는 데이터전송시 문제점에 대하여 고찰한 것이다. 경보설비의 구성에서 중계기와 수신기간의 통신 형태를 측정하여 보편화된 통신방식을 사용하였다는 것을 알 수 있었으며 수신기에서 통신네트윅간의 연결은 수신기의 Ethernet 통신모듈을 통한 프로토콜 형태를 확인하였다.

• Proceedings of the KIEE Conference
• /
• 1998.07c
• /
• pp.905-907
• /
• 1998

The setting of protective relays, which is critical to the system security, requires a huge volume of data and a lot of repetitive calculations. Since an effective design of a database is essential. The relay setting database must accommodate a variety of protective devices. Also its information can be viewed and updated with easy by humans and by computer programs. This paper describes several existing database designs for power system protection, their advantages and disadvantages. Also this paper develops an effective database for power system protection with their advantages.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.805-808
• /
• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.