• Title/Summary/Keyword: process margin

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A Technique to Circumvent V-shaped Deconvolution Error for Time-dependent SRAM Margin Analyses

  • Somha, Worawit;Yamauchi, Hiroyuki;Yuyu, Ma
    • IEIE Transactions on Smart Processing and Computing
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    • 제2권4호
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    • pp.216-225
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    • 2013
  • This paper discusses the issues regarding an abnormal V-shaped error confronting algebraic-based deconvolution process. Deconvolution was applied to an analysis of the effects of the Random Telegraph Noise (RTN) and Random Dopant Fluctuation (RDF) on the overall SRAM margin variations. This paper proposes a technique to suppress the problematic phenomena in the algebraic-based RDF/RTN deconvolution process. The proposed technique can reduce its relative errors by $10^{10}$ to $10^{16}$ fold, which is a sufficient reduction for avoiding the abnormal ringing errors in the RTN deconvolution process. The proposed algebraic-based analyses allowed the following: (1) detection of the truncating point of the TD-MV distributions by the screening test, and (2) predicting the MV-shift-amount by the assisted circuit schemes needed to avoid the out of specs after shipment.

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Continuous Pretilt Control Using Heterogeneous Polyimide Mixture

  • Kim, Young-Ki;Gwag, Jin-Seog;Jo, Soo-In;Kim, Jae-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1584-1587
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    • 2008
  • We proposed a technique controlling continuously pretilt angle in full range with high process margin. The proposed method is characterized by tuning thickness of heterogeneous polyimide (PI) layer that homeotropic PI is mixed with planar PIs.

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Overlap Margin 확보 및 Side-lobe 억제를 위한 Scattering Bar Optical Proximity Correction (Scattering Bar Optical Proximity Correction to Suppress Overlap Error and Side-lobe in Semiconductor Lithography Process)

  • 이흥주
    • 한국산학기술학회논문지
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    • 제4권1호
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    • pp.22-26
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    • 2003
  • Attenuated PSM lithography 공정에서 overlay margin 확보 및 side-lobe 제거를 위해 기존의 Cr shield 방식의 단점인 복잡한 mask 제작공정과 구조를 단순화하기 위한 방법으로 scattering bar 방식을 제안하였다. Scattering bar는 Cr 보조패턴처럼 완전히 빛을 차단하는 것이 아니라 약간의 빛을 투과시켜 보강된 intensity를 상쇄하므로 side-lobe를 억제하는 방법으로 metal pattern을 생성할 때 scattering bar도 동시에 만들어 mask제작에 필요한 공정횟수를 줄이고 mask구조 역시 단순하게 한다 그리고 동시에 DOF(depth of focus)를 향상시킨다. Background clear pattern의 경우에 발생하는 side-lobe도 scattering bar를 이용하여 효율적으로 제거되었다.

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A Simple Static Noise Margin Model of MOS CML Gate in CMOS Processes

  • Jeong, Hocheol;Kang, Jaehyun;Lee, Kang-Yoon;Lee, Minjae
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권3호
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    • pp.370-377
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    • 2017
  • This paper presents a simple noise margin (NM) model of MOS current mode logic (MCML) gates especially in CMOS processes where a large device mismatch deteriorates logic reliability. Trade-offs between speed and logic reliability are discussed, and a simple yet accurate NM equation to capture process-dependent degradation is proposed. The proposed NM equation is verified for 130-nm, 110-nm, 65-nm, and 40-nm CMOS processes and has errors less than 4% for all cases.

Novel Self-Reference Sense Amplifier for Spin-Transfer-Torque Magneto-Resistive Random Access Memory

  • Choi, Jun-Tae;Kil, Gyu-Hyun;Kim, Kyu-Beom;Song, Yun-Heub
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권1호
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    • pp.31-38
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    • 2016
  • A novel self-reference sense amplifier with parallel reading during writing operation is proposed. Read access time is improved compared to conventional self-reference scheme with fast operation speed by reducing operation steps to 1 for read operation cycle using parallel reading scheme, while large sense margin competitive to conventional destructive scheme is obtained by using self-reference scheme. The simulation was performed using standard $0.18{\mu}m$ CMOS process. The proposed self-reference sense amplifier improved not only the operation speed of less than 20 ns which is comparable to non-destructive sense amplifier, but also sense margin over 150 mV which is larger than conventional sensing schemes. The proposed scheme is expected to be very helpful for engineers for developing MRAM technology.

CCD 폭 측정 시스템 및 퍼지 PID를 이용한 CFWC 제어기 설계 (CFWC Scheme for Width Control using CCD Measurement System and Fuzzy PID Controller in Hot Strip Mills)

  • 박철재
    • 제어로봇시스템학회논문지
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    • 제19권11호
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    • pp.991-997
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    • 2013
  • In this paper, we propose a CFWC (CCD and fuzzy PID based width control) scheme to obtain the desired delivery width margin of a vertical rolling mill in hot strip process. A WMS(width measurement system) is composed of two line scan cameras, an edge detection algorithm, a glitch filter, and so on. A dynamic model of the mill is derived from a gauge meter equation in order to design the fuzzy PID controller. The controller is a self-learning structure to select the PID gains from the error and error rate of the width margin. The effectiveness of the proposed CFWC is verified from simulation results under a width disturbance of the entry in the mill. Using a field test, we show that the performance of the width control is improved by the proposed control scheme.

SRAM 셀 안정성 분석을 이용한 고속 데이터 처리용 TCAM(Ternary Content Addressable Memory) 설계 (High Speed TCAM Design using SRAM Cell Stability)

  • 안은혜;최준림
    • 한국산업정보학회논문지
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    • 제18권5호
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    • pp.19-23
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    • 2013
  • 본 논문에서는 고속 데이터 처리용 TCAM(Ternary Content Addressable Memory) 설계를 위하여 6T SRAM cell의 안정성 분석 방법에 대해 기술하였다. TCAM은 고속 데이터 처리를 목적으로 하기 때문에 동작 주파수가 높아질수록 필요 시 되는 CMOS 공정의 단위가 작아지게 된다. 공급 전압의 감소는 TCAM 동작에 불안정한 영향을 줄 수 있으므로 SRAM cell 안정성 분석을 통한 TCAM 설계가 필수적이다. 우리는 6T SRAM의 정적 노이즈 마진(SNM)을 측정하여 분석하였고, TCAM의 모든 시뮬레이션은 $0.18{\mu}m$ CMOS 공정을 사용하여 확인하였다.

Design of Shrinkage Margin for Thin Panel Welded Structure during Manufacturing Process

  • Lee D. J.;Shin S. B.
    • International Journal of Korean Welding Society
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    • 제5권1호
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    • pp.44-52
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    • 2005
  • The purpose of this study is to establish a design tool for the shrinkage margin of a deckhouse caused by welding and flame straightening. In order to do it, the effects of heat intensity and internal/external restraint condition on the shrinkage of the simple weldments were investigated, in order to identity the principal factors controlling shrinkage caused by welding process and flame straightening. Based on the results, predictive equations for longitudinal and transverse shrinkage at the welded structure were formulated as the function of heat intensity and in-plane rigidity. These equations were verified by comparing predicted results with the measured results at a panel structure of deckhouse.

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Regulatory Aspect of Risk Assessment and Management

  • Lee, Hyomin;EunkyungYoon;Jeeyeun Han
    • Toxicological Research
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    • 제17권
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    • pp.17-24
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    • 2001
  • Risk assessment is useful tool making good decisions on the risks of certain hazardous com-pound and suggests safe margin through scientific process using toxicological data, statistical tool, exposure value and relevant variants. The goal of risk management is to protect the public health from hazardous compound based on result of risk assessment having reality. For the suggestion of exact man-aging information, risk assessment must be designed to represent a "plausible estimate" of the exposure to the individuals and to minimize uncertainty. Risk assessment methodology and knowledge are expected to change more rapidly than before and up-to-date methodology should be applied in regulatory aspects through the Agency. For the useful application of risk assessment, the communication between the risk assessor and the risk manager is needed before the initiation of the risk assessment and upon its completion. Generally, the risk assessment itself as a practical tool in the regulatory decision making process would be regarded with social economic impact.ic impact.

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0.12$\mu\textrm{m}$설계규칙을 갖는 DRAM 셀 주용 레이어의 OPC 및 PSM (Study the Feasibility of Optical Lithography for critical Lyers of 0.12$\mu\textrm{m}$)

  • 박기천;오용호;임성우;고춘수;이재철
    • 한국전기전자재료학회논문지
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    • 제14권1호
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    • pp.6-11
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    • 2001
  • We studied the feasibility of optical lithography for the critical layers of 0.12${\mu}{\textrm}{m}$ DRAM assuming ArF excimer laser as a light source. To enhance the fidelity of aerial image and process margin, Phase shift mask (PSM) patterns as well as binary mask patterns are corrected with in-house developed Optical Proximity Correction (OPC) software. As the result, w found that the aerial image of critical layers of DRAM cell with 0.12${\mu}{\textrm}{m}$ design rule could not be reproduced with binary masks. But if we use PSM or optical proximity corrected PSM, the fidelity of aerial image ,resolution and process margin are so much enhanced that they could be processed with optical lithography.

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