• Journal of information and communication convergence engineering
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• v.6 no.4
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• pp.417-420
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• 2008

Solar electric systems have very little impact on environment, making them one of the cleanest power-generating technologies available. While they are operating, PV systems produce no air pollution, hazardous waste, or noise, and they require no transportable fuels. In PV system design, the selection and proper installation of appropriately-sized components directly affect system reliability, lifetime, and initial cost. In this research, we have studied the PWM(Pulse Width Modulation) signals. I proposed an efficient photovoltaic power interface circuit incorporated with a DC-DC converter and a sine-pwm control method full-bridge inverter. In grid-connected solar power systems, the DC-DC converter operates at high switching frequency to make the output current a sine wave, whereas the full-bridge inverter operates at low switching frequency which is determined by the ac frequency. Thus, it can reduce the switching losses incurred by the full-bridge inverter. Full-bridge converter is controlled by using microprocessor control method, and its operation is verified through computer aided simulations.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.2
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• pp.217-221
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• 2001

In this paper, APLC(Active Power Line Conditioner) is designed for low consumed power electrical equipment such as communication electronic equipment, computer sever and etc.. Because APLC which is hunted to the mains controls only the elements of harmonics, the designed APLC is very high efficient. Additionally, controller designed with low cost micro-controller and analog circuit has good merit economically. Simulation and experimental results on a prototype verify the feasibility of the proposed scheme.

• Journal of Electrical Engineering and Technology
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• v.4 no.1
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• pp.79-86
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• 2009

This paper presents a flyback technology in power conversion aimed at increasing efficiency and power density, reducing cost and using minimum components in AC-DC conversion. The proposed converter provides these features for square waveforms and constant frequency PWM. It is designed to operate in a wide input voltage range of 75-265VAC RMS with two output voltages of 5V and 20V respectively and full load output power of 5W. The proposed converter is suitable for high efficiency and high power density application such as LCDs, TV power modules, AC adapters, motor control, appliance control, telecom and networking products.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.4
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• pp.191-200
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• 2002

When power consumption increases, power supply must be efficient and reliable for good power quality. The studies on compensation system of power quality are processing actively. Voltage sag among of factors for power quality is generally PI dual control that voltage sag compensation is used. But this control is no more available since of 120[KHz] ripple rejection. So we proposed the control algorithm using PID control in 3-phase unbalanced power system and the series voltage compensator, when voltage sag occurs.

• Journal of Digital Convergence
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• v.12 no.3
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• pp.211-218
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• 2014

Recently, wind energy is expanding to combination of computing to forecast of wind power generation as well as intelligent of wind powerturbine. Wind power is rise and fall depending on weather conditions and difficult to predict the output for efficient power production. Wind power is need to reliably linked technology in order to efficient power generation. In this paper, distributed power generation forecasts to enhance the predicted and actual power generation in order to minimize the difference between the power of distributed power short-term prediction model is designed. The proposed model for prediction of short-term combining the physical models and statistical models were produced in a physical model of the predicted value predicted by the lattice points within the branch prediction to extract the value of a physical model by applying the estimated value of a statistical model for estimating power generation final gas phase produces a predicted value. Also, the proposed model in real-time National Weather Service forecast for medium-term and real-time observations used as input data to perform the short-term prediction models.

• ETRI Journal
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• v.42 no.4
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• pp.596-607
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• 2020

Scaling is an important operation because of the iterative nature of arithmetic processes in digital signal processors (DSPs). In residue number system (RNS)-based DSPs, scaling represents a performance bottleneck based on the complexity of intermodulo operations. To design an efficient RNS scaler for special moduli sets, a body of literature has been dedicated to the study of the well-known moduli sets {2ⁿ - 1, 2ⁿ, 2ⁿ + 1} and {2ⁿ, 2ⁿ - 1, 2ⁿ⁺¹ - 1}, and their extension in vertical or horizontal forms. In this study, we propose an efficient programmable RNS scaler for the arithmetic-friendly moduli set {2^n+p, 2ⁿ - 1, 2ⁿ⁺¹ - 1}. The proposed algorithm yields high speed and energy-efficient realization of an RNS programmable scaler based on the effective exploitation of the mixed-radix representation, parallelism, and a hardware sharing technique. Experimental results obtained for a 130 nm CMOS ASIC technology demonstrate the superiority of the proposed programmable scaler compared to the only available and highly effective hybrid programmable scaler for an identical moduli set. The proposed scaler provides 43.28% less power consumption, 33.27% faster execution, and 28.55% more area saving on average compared to the hybrid programmable scaler.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.12
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• pp.2731-2740
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• 2012

ASIC(application specific integrated circuit) process is a set of various technologies for fabricating a chip. Generally there have been many researches for RTL design, synthesis, floor plan & routing, low power scheme, clock tree synthesis, and testability which are widely researched in recent. In this paper we propose a new methodology of power strap routing in basis of design experience and experiment. First the power strap for vertical VDD and VSS and horizontal VDD and VSS is routed, and then after the problems which are generated in this process are analyzed, we propose a new process for resolving them. For this, the strap guide is inserted to protect the unnecessary strap routing and dumped for next steps. Next the unnecessary power straps which are generated the first inserting process are removed, and the pre-routing is performed for the macro cells. Finally the resultant power straps are routed using the dumped routing guide. Through the proposed process we identified the efficient and stable route of the power straps.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.3
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• pp.555-562
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• 2008

In this paper we proposed a practical low-power design technique using clock-gating in RTL. An efficient low-power methodology is that a high-level designer analyzes a generic system and designs a controller for clock-gating. Also the desirable flow is to derive clock-gating in normal synthesis process by synthesis tool than to insert directly gate to clock line. If low-power is considered in coding process, clock is gated in coding process. If not considered, after analyzing entire operation. clock is Bated in periods of holding data. After analyzing operation for clock-gating, a controller was designed for it, and then a low-power circuit was generated by synthesis tool. From result, we identified that the consumed power of register decreased from 922mW to 543mW, that is the decrease rate is 42%. In case of synthesizing the test circuit using synthesizer of Power Theater, it decreased from 322mW to 208mW (36.5% decrease).

• Journal of Power Electronics
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• v.16 no.4
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• pp.1288-1297
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• 2016

This study proposes a single-stage light-emitting diode (LED) tube lamp driver with input-current shaping for T8/T10-type fluorescent lamp replacements. The proposed AC-DC LED driver integrates a dual-boost converter with coupled inductors and a half-bridge series-resonant converter with a bridge rectifier into a single-stage power conversion topology. This paper presents the operational principles and design considerations for one T8-type 18 W-rated LED tube lamp with line input voltages ranging from 100 V rms to 120 V rms. Experimental results for the prototype driver show that the highest power factor (PF = 0.988), lowest input current total harmonic distortion (THD = 7.22%), and highest circuit efficiency (η = 92.42%) are obtained at an input voltage of 120 V. Hence, the proposed driver is feasible for use in energy-efficient indoor lighting applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.43-49
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• 2009

We present an efficient estimation method of the battery lifetime considering various power consumption profiles in wireless sensor nodes. The power profiles in single and periodic modes and the current dissipations in different operating modes are taken into account to find the total current consumption. Also, the self-discharge rate of a battery is taken into account to estimate the battery lifetime of a given sensor node. Finally we present a governing equation for finding the battery lifetime. We believe the proposed estimation method of the battery lifetime can be an efficient and effective method for low power design of sensor nodes.