• Title/Summary/Keyword: power MOS

Search Result 239, Processing Time 0.03 seconds

A 2.4GHz Back-gate Tuned VCO with Digital/Analog Tuning Inputs (디지털/아날로그 입력을 통한 백게이트 튜닝 2.4 GHz VCO 설계)

  • Oh, Beom-Seok;Lee, Dae-Hee;Jung, Wung
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
    • /
    • 2003.11a
    • /
    • pp.234-238
    • /
    • 2003
  • In this work, we have designed a fully integrated 2.4GHz LC-tuned voltage-controlled oscillator (VCO) with multiple tuning inputs for a $0.25-{\mu}m$ standard CMOS Process. The design of voltage-controlled oscillator is based on an LC-resonator with a spiral inductor of octagonal type and pMOS-varactors. Only two metal layer have been used in the designed inductor. The frequency tuning is achieved by using parallel pMOS transistors as varactors and back-gate tuned pMOS transistors in an active region. Coarse tuning is achieved by using 3-bit pMOS-varactors and fine tuning is performed by using back-gate tuned pMOS transistors in the active region. When 3-bit digital and analog inputs are applied to the designed circuits, voltage-controlled oscillator shows the tuning feature of frequency range between 2.3 GHz and 2.64 GHz. At the power supply voltage of 2.5 V, phase noise is -128dBc/Hz at 3MHz offset from the carrier, Total power dissipation is 7.5 mW.

  • PDF

A 2.4 ㎓ Back-gate Tuned VCO with Digital/Analog Tuning Inputs (디지털/아날로그 입력을 통해 백게이트 튜닝을 이용한 2.4 ㎓ 전압 제어 발진기의 설계)

  • Oh, Beom-Seok;Hwang, Young-Seung;Chae, Yong-Doo;Lee, Dae-Hee;Jung, Wung
    • Proceedings of the IEEK Conference
    • /
    • 2003.11c
    • /
    • pp.32-36
    • /
    • 2003
  • In this work, we have designed a fully integrated 2.4GHz LC-tuned voltage-controlled oscillator (VCO) with multiple tuning inputs for a 0.25-$\mu\textrm{m}$ standard CMOS process. The design of voltage-controlled oscillator is based on an LC-resonator with a spiral inductor of octagonal type and pMOS-varactors. Only two metal layer have been used in the designed inductor. The frequency tuning is achieved by using parallel pMOS transistors as varactors and back-gate tuned pMOS transistors in an active region. Coarse tuning is achieved by using 3-bit pMOS-varactors and fine tuning is performed by using back-gate tuned pMOS transistors in the active region. When 3-bit digital and analog inputs are applied to the designed circuits, voltage-controlled oscillator shows the tuning feature of frequency range between 2.3 GHz and 2.64 GHz. At the power supply voltage of 2.5 V, phase noise is -128dBc/Hz at 3MHz offset from the carrier. Total power dissipation is 7.5 mW.

  • PDF

A study on the PWM power converter with high frequency and high voltage using MOS-GTO (MOS-GTO를 이용한 고주파, 고전압 전력변환기 설계에 관한 연구)

  • Roh, Jin-Eep;Seong, Se-Jin
    • Proceedings of the KIEE Conference
    • /
    • 1992.07b
    • /
    • pp.1009-1011
    • /
    • 1992
  • This paper discribes a study on the bridge type power converter for laser high power generator with high frequency and high voltage using MOS-GTO. This converter effectively makes the best of the high frequency HV transformer and input-side equivalent parasitic capacitance of high voltage feeding cable in place of DC output smoothing filter. The cicuit configuration and performance are discussed and design criteria are given. The prototype rated of 10 KW, 100 KHz is implemented and experimental results are given.

  • PDF

A Novel 800mV Beta-Multiplier Reference Current Source Circuit for Low-Power Low-Voltage Mixed-Mode Systems (저전압 저전력 혼성신호 시스템 설계를 위한 800mV 기준전류원 회로의 설계)

  • Kwon, Oh-Jun;Woo, Son-Bo;Kim, Kyeong-Rok;Kwack, Kae-Dal
    • Proceedings of the IEEK Conference
    • /
    • 2008.06a
    • /
    • pp.585-586
    • /
    • 2008
  • In this paper, a novel beta-multiplier reference current source circuit for the 800mV power-supply voltage is presented. In order to cope with the narrow input common-mode range of the OpAmp in the reference circuit, shunt resistive voltage divider branches were deployed. High gain OpAmp was designed to compensate intrinsic low output resistance of the MOS transistors. The proposed reference circuit was designed in a standard 0.18um CMOS process with nominal Vth of 420mV and -450mV for nMOS and pMOS transistor respectively. The total power consumption including OpAmp is less than 50uW.

  • PDF

Low-Power Wide-Tuning Range Differential LC-tuned VCO Design in Standard CMOS

  • Kim, Jong-Min;Woong Jung
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
    • /
    • 2002.11a
    • /
    • pp.21-24
    • /
    • 2002
  • This paper presents a fully integrated, wide tuning range differential CMOS voltage-controlled oscillator, tuned by pMOS-varactors. VCO utilizing a novel tuning scheme is reported. Both coarse digital tuning and fine analog tuning are achieved using pMOS-varactors. The VCO were implemented in a 0.18-fm standard CMOS process. The VCO tuned from 1.8㎓ to 2.55㎓ through 2-bit digital and analog input. At 1.8V power supply voltage and a total power dissipation of 8mW, the VCO features a phase noise of -126㏈c/㎐ at 3㎒ frequency offset.

  • PDF

Data flow for MOS-EMS system interoperation (MOS-EMS 연계 데이터 흐름)

  • Lee, K.J.;Park, M.C.;Lee, K.W.;Kim, S.H.
    • Proceedings of the KIEE Conference
    • /
    • 2006.07d
    • /
    • pp.2134-2135
    • /
    • 2006
  • 전력거래소는 발전경쟁시장(CBP; Cost-Based Pool) 장기화에 따른 운영상의 효율성을 개선하고 기 개발된 시장운영시스템(MOS; Market Operation System)을 활용하여 급전체계를 개선하기 위해 준비중이다. 현행 급전체계에서는 거래 전일에 수행한 수요예측을 바탕으로 1시간 단위운영발전계획을 전일에 수립하고 EMS(Energy Management System)를 이용하여 발전기에 대한 경제부하배분(ED; Economic Dispatch)을 시행하고 있지만, 현 EMS는 시장체제 환경 전에 도입된 설비로 시장환경에 대한 고려가 되어 있지 않고 계통운영 보조서비스의 실시간 반영이 어려운 점이 있다. 전력거래소는 실시간 급전 운영을 위해 기존 EMS에 MOS를 연계하여 MOS의 5분 단위 수요예측량을 기반으로 송전망 제약과 예비력 요구량 등을 고려한 발전기별 경제부하 배분량 및 예비력 배분량을 결정하고, 추가적으로 EMS에서 수요예측 오차 및 주파수 보정량을 실시간으로 계산하여 발전기별로 배분하도록 함으로써, 1일 전 시행하던 급전계획을 취득 자료를 기반으로 5분 단위로 실시간 계산할 수 있도록 급전 체계를 개선할 계획이다. 이를 통해 실시간으로 에너지와 예비력을 동시에 최적화함으로 전력시장 및 전력계통 운영을 한층 선진화 할 수 있는 계기를 마련하였으며 또한 저비용 발전기 사용을 극대화함으로 발전비용의 절감에도 기여하는 효과를 기대할 수 있다. MOS-EMS간 자료연계에는 ICCP(Inter-Control Communication Protocol)와 FTP 프로토콜을 사용하였고, 수차례 모의운영을 통하여 데이터베이스 및 현장 취득 자료의 정확도(accuracy)가 양 시스템 간 연계 및 전력 계통의 안정적 운영에 매우 중요한 요소로 나타났다. 전력거래소는 장기적으로 CIM(Common Information Model)기반의 표준 전력계통 데이터베이스를 구축하고 시스템 간 자료 연계를 위해 XML을 활용하여 시스템 간 상호 운영성(Interoperability)과 자료 연계의 안정성을 높일 계획이다. 본 논문은 MOS-EMS 연계에 따른 시스템 간 자료의 흐름 및 처리에 대해 주로 설명하고자 한다.

  • PDF

Design Requirement to use MOS system(for Wholesale competition) UNDER Generation competition Rule (발전경쟁시장에서 도매경쟁시장을 위해 설계된 MOS시스템 활용을 위한 요구사항)

  • Kim, Min-Bae
    • Proceedings of the KIEE Conference
    • /
    • 2008.07a
    • /
    • pp.588-589
    • /
    • 2008
  • 우리나라는 2001년 4월 이후 전력산업구조개편을 추진 중에 있다. 한 기업에 의해 발전, 송전, 배전, 판매를 독점하던 체계에서 전력시장 개방을 단계별로 진행중에 있는데, 최초에 계획된 전력시장 개발 일정은 다음과 같다. - 발전경쟁 : $2001.04{\sim}2004.06$ - 도매경쟁 : $2004.07{\sim}2008.12$ - 소매경쟁 : $2009.01{\sim}$ 발전경쟁시장에서 도매경쟁시장으로 전환되는 시점에서 국가차원의 결정에 의해 도매경쟁시장으로의 진입이 잠정 중단되었다. 그 당시 우리는 도매경쟁시장을 위한 시스템(MOS)을 이미 구축한 상태였다. 도매경쟁시장을 위해 설계된 MOS시스템은 발전경쟁시장을 위해 현재 사용되고 있는 CBP시스템에는 갖추고 있지 않은 우수한 기능들을 다수 보유하고 있는데 5분단위 급전계획(FMD)이 그것 중 최고기능이라고 할 수 있다. 본 논문에서는 CBP시스템을 사용하는 발전경쟁시장에서 MOS시스템의 5분 단위 급전계획(FMD)을 활용하기 위한 설계 요구사항을 논의하고자 한다.

  • PDF

An Automatic Power Control Circuit suitable for High Speed Burst-mode optical transmitters (고속 버스트 모드 광 송신기에 적합한 자동 전력 제어 회로)

  • Ki, Hyeon-Cheol
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.43 no.11 s.353
    • /
    • pp.98-104
    • /
    • 2006
  • The conventional burst-mode APC(Automatic Power Control) circuit had an effective structure that was suitable for a low power consumption and a monolithic chip. However, as data rate was increased, it caused errors due to the effect of the zero density. In this paper, we invented a new structured peak-comparator which could compensate the unbalance of the injected currents using double gated MOS and MOS diode. And we proposed a new burst-mode APC adopting it. The new peak-comparator in the proposed APC was very robust to zero density variations maintaining the correct decision point of the current comparison at high data rate. It was also suitable for a low power consumption and a monolithic chip due to lack of large capacitors.

Online output power measurement of full-bridged MOS-FET RF power inverter operating at shortwave frequency

  • Suzuki, Taiju;Suyama, Tetsuji;Yamamoto, Tetsuya;Ikeda, Hiroaki;Yoshida, Hirofumi;Shinohara, Shigenobu
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 1991.10b
    • /
    • pp.1920-1923
    • /
    • 1991
  • An online RF power measurement is needed for the full-bridged MOS-FET RF power inverter because the output current and/or voltage waveform is other than sinusoidal. In order to satisfy the requirement, the online measurement of the output power of this type of RF power inverter by the use of the PC-98 personal computer has been presented. The current and voltage waveforms are sensed by the digital oscilloscope probes so as to obtain the instantaeous power and they are entered into the PC98 personal computer so as to average the instantaneous powers. The RF power of up to 1 kw at 1 MHz measured for the power inverter at the output transformer. This method was confirmed to be applied to evaluate the load resistance change with temperature.

  • PDF

50V Power MOSFET with Improved Reverse Recovery Characteristics Using an Integrated Schottky Body Diode (Schottky Body Diode를 집적하여 향상된 Reverse Recovery 특성을 가지는 50V Power MOSFET)

  • Lee, Byung-Hwa;Cho, Doo-Hyung;Kim, Kwang-Soo
    • Journal of IKEEE
    • /
    • v.19 no.1
    • /
    • pp.94-100
    • /
    • 2015
  • In this paper, 50V power U-MOSFET which replace the body(PN) diode with Schottky is proposed. As already known, Schottky diode has the advantage of reduced reverse recovery loss than PN diode. Thus, the power MOSFET with integrated Schottky integrated can minimize the reverse recovery loss. The proposed Schottky body diode U-MOSFET(SU-MOS) shows reduction of reverse recovery loss with the same transfer, output characteristic and breakdown voltage. As a result, 21.09% reduction in peak reverse current, 7.68% reduction in reverse recovery time and 35% improvement in figure of merit(FOM) are observed when the Schottky width is $0.2{\mu}m$ and the Schottky barrier height is 0.8eV compared to conventional U-MOSFET(CU-MOS). The device characteristics are analyzed through the Synopsys Sentaurus TCAD tool.