• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.22 no.6
• /
• pp.462-465
• /
• 2009

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method, The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than 10), Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.7 no.6
• /
• pp.1056-1063
• /
• 2006

Thermal evaporated 10 nm-Ni/l nm-Ir/(or polycrystalline)p-Si(100) and 10 nm-$Ni_{50}Co_{50}$/(or polycrystalline)p-Si(100) films were thermally annealed using rapid thermal annealing fur 40 sec at $300{\sim}1200^{\circ}C$. The annealed bilayer structure developed into Ni(Ir or Co)Si and resulting changes in sheet resistance, microstructure, phase and composition were investigated using a four-point probe, a scanning electron microscopy, a field ion beam, an X-ray diffractometer and an Auger electron spectroscope. The final thickness of Ir- and Co-inserted nickel silicides on single crystal silicon was approximately 20$\sim$40 nm and maintained its sheet resistance below 20 $\Omega$/sq. after the silicidation annealing at $1000^{\circ}C$. The ones on polysilicon had thickness of 20$\sim$55 nm and remained low resistance up to $850^{\circ}C$. A possible reason fur the improved thermal stability of the silicides formed on single crystal silicon substrate is the role of Ir and Co in preventing $NiSi_2$ transformation. Ir and Co also improved thermal stability of silicides formed on polysilicon substrate, but this enhancement was lessened due to the formation of high resistant phases and also a result of silicon mixing during high temperature diffusion. Ir-inserted nickel silicides showed surface roughness below 3 nm, which is appropriate for nano process. In conclusion, the proposed Ir- and Co- inserted nickel silicides may be superior over the conventional nickel monosilicides due to improved thermal stability.

• Bulletin of the Korean Chemical Society
• /
• v.8 no.1
• /
• pp.6-9
• /
• 1987

The study of the $Na_3YSi_3O_9$ structure, by x-ray diffraction and infrared spectrum, showed that $Na_3YSi_3O_9$ is similar to $Na_4CaSi_3O_9$ except for its being pseudo-cubic instead of cubic. The peaks in the x-ray diffraction pattern of $Na_3YSi_3O_9$ could therefore be indexed on the basis of the $Na_4CaSi_3O_9$ cell. Also, modified $Na_3MSi_3O_9$ (M = Lu, Yb, Tm, Er, Y, Ho, Dy, Gd, Eu, and Sm) type compounds were synthesized by introducing excess sodium, decreasing M(III) concentration, and substituting small amount of phosphorus for silicon. The unit cell parameters of the composition $Na_{3.2}M_{0.7}Si_{2.9}P_{0.1}O_{8.7}$ were estimated from x-ray powder diffraction patterns using the Cohen method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.06a
• /
• pp.59-62
• /
• 1998

Thermal treatment dependences of MFS devices in $BaMgF_4$ on Si structures have been investigated. $BaMgF_4$ thin films have been directly deposited on the p-Si(100) wafers at a low temperature of $300^{\circ}$ in an ultra high vacuum(UHV) system. After in-situ post-deposition annealing was conducted for 20 s at $650^{\circ}$, bias and temperature were applied to $BaMgF_4/Si$ structures. Although X-ray diffraction analysis showed that the films were polycrystalline in nature before and after bias temperature, the C-V properties were some different between with and without bias-temperature treatment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.11a
• /
• pp.87-88
• /
• 2006

Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.35D no.12
• /
• pp.68-74
• /
• 1998

Improved performance and suppressed short-channel effects of polysilicon thin film transistors (poly-Si TFTs) with very thin electron cyclotron resonance (ECR) $N_2$O-plasma gate oxide have been investigated. Poly-Si TFTs with ECR $N_2$O-plasma oxide ($N_2$O-TFTs) show better performance as well as suppressed short-channel effects than those with conventional thermal oxide. The fabricated $N_2$O-TFTs do not show threshold voltage reduction until the gate length is reduced to 3 ${\mu}{\textrm}{m}$ for n-channel and 1 ${\mu}{\textrm}{m}$ for p-channel, respectively. The improvements are due to the smooth interface, passivation effects, and strong Si ≡ N bonds.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.151-151
• /
• 2010

In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.48 no.9
• /
• pp.623-627
• /
• 1999

We report a new in-situ fluorine passivation method without in implantation by employing excimer laser annealing of $SiO_{x}F_{y}$/a-Si structure and its effects on p-channel poly-Si TFTs. The proposed method doesn't require any additional annealing step and is a low temperature process because fluorine passivation is simultaneous with excimer-laser-induced crystallization. A in-situ fluorine passivation by the proposed method was verified form XPS analysis and conductivity measurement. From experimental results, it has been shown that the proposed method is effective to improve the electrical characteristics, specially field-effect mobility, and the electrical stability of p-channel poly-Si TFTs. The improvement id due to fluorine passivation, which reduces the trap state density and forms the strong Si-F bonds in poly-Si channel and $SiO_2/poly-Si$ interface. From these results, the high performance poly-Si TFTs canbe obtained by employing the excimer-laser-induced fluorine passivation method.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.51 no.6
• /
• pp.229-235
• /
• 2002

This paper presents the fabrication of polycrystalline thin film transistor(TFT) using sequential lateral solidification(SLS) of amorphous silicon. The fabricated SLS TFT showed high Performance suitable for active matrix liquid crystal display(AMLCD). The SLS process involves (1) a complete melting of selected area via irradiation through a patterned mask, and (2) a precisely controlled pulse translation of the sample with respect to the mask over a distance shorter than the super lateral growth(SLG) distance so that lateral growth extended over a number of iterative steps. The SLS experiment was performed with 550$\AA$ a-Si using 308nm XeCl laser having $2\mu\textrm{m}$ width. Irradiated laser energy density is 310mJ/$\textrm{cm}^2$ and pulse duration time was 25ns. The translation distance was 0.6$\mu$m/pulse, 0.8$\mu$m/pulse respectively. As a result, a directly solidified grain was obtained. Thin film transistors (TFTs) were fabricated on the poly-Si film made by SLS process. The characteristics of fabricated SLS p -type poly-Si TFT device with 2$\mu\textrm{m}$ channel width and 2$\mu\textrm{m}$ channel length showed the mobility of 115.5$\textrm{cm}^2$/V.s, the threshold voltage of -1.78V, subthreshold slope of 0.29V/dec, $I_{off}$ current of 7$\times$10$^{-l4}$A at $V_{DS}$ =-0.1V and $I_{on}$ / $I_{off}$ ratio of 2.4$\times$10$^{7}$ at $V_{DS}$ =-0.1V. As a result, SLS TFT showed superior characteristics to conventional poly-Si TFTs with identical geometry.y.y.y.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.9 no.3
• /
• pp.279-284
• /
• 2014

This paper proposes a novel OLED pixel circuit to compensate the threshold voltage variation of p-channel low temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed 5-TFT OLED pixel circuit consists of 4 switching TFTs, 1 OLED driving TFT and 1 capacitor. One frame of the proposed pixel circuit is divided into initialization period, threshold voltage sensing and data programming period, data holding period and emission period. SmartSpice simulation results show that the maximum error rate of OLED current is -4.06% when the threshold voltage of driving TFT varies by ${\pm}0.25V$ and that of OLED current is 9.74% when the threshold voltage of driving TFT varies by ${\pm}0.50V$. Thus, the proposed 5T1C pixel circuit can realize uniform OLED current with high immunity to the threshold voltage variation of p-channel poly-Si TFT.