• Journal of Information Display
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• v.4 no.3
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• pp.17-21
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• 2003

A low temperature doping technique to be applied in poly-Si TFTs on plastic substrates was investigated. Heavily-doped amorphous silicon layers were deposited on poly-Si and the dopant atoms were driven in by subsequent excimer laser annealing. The entire process was carried out under a substrate temperature of 120 $^{\circ}C$, and a sheet resistance of as low as 300 ${\Omega}$/sq. was obtained.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.130-130
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• 2009

This paper describes the temperature characteristics of polycrystalline 3C-SiC micro resonators. The 1.2 ${\mu}m$ and 0.4 ${\mu}m$ thick polycrystalline 3C-SiC cantilever and doubly clamped beam resonators with 60 ~ 100 ${\mu}m$ lengths were fabricated using a surface micromachining technique. Polycrystalline 3C-SiC micro resonators were actuated by piezoelectric element and their fundamental resonance was measured by a laser vibrometer in vacuum at temperature range of $25{\sim}200^{\circ}C$. The TCF(Temperature Coefficient of Frequency) of 60, 80 and 100 ${\mu}m$ long cantilever resonators were -9.79, -7.72 and -8.0 $ppm/^{\circ}C$. On the other hand, TCF of 60, 80 and 100 ${\mu}m$ long doubly clamped beam resonators were -15.74, -12.55 and -8.35 $ppm/^{\circ}C$. Therefore, polycrystalline 3C-SiC resonators are suitable with RF MEMS devices and bio/chemical sensor applications in harsh environments.

• Membrane Journal
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• v.28 no.4
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• pp.221-232
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• 2018

The silica containing carbon ($C-SiO_2$) membranes were fabricated using poly(imide siloxane)(Si-PI) and polyvinylpyrrolidone (PVP) blended polymer. The characteristics of porous carbon structures prepared by the pyrolysis of polymer blends were related with the micro-phase separation behaviors of the two polymers. The glass transition temperatures ($T_g$) of the mixed polymer blends of Si-PI and PVP were observed with a single $T_g$ using differential scanning calorimetry. Furthermore, the nitrogen adsorption isotherms of the $C-SiO_2$ membranes were investigated to define the characteristics of porous carbon structures. The $C-SiO_2$ membranes derived from Si-PI/PVP showed the type IV isotherm and possessed the hysteresis loop, which was associated with the mesoporous carbon structures. For the molecular sieving probe, the $C-SiO_2$ membranes were prepared with the ratio of Si-PI/PVP and the pyrolysis conditions, such as the pyrolysis temperature and the isothermal times. Consequently, the $C-SiO_2$ membranes prepared by the pyrolysis of Si-PI/PVP at $550^{\circ}C$ with the isothermal time of 120 min showed the $O_2$ permeability of 820 Barrer ($1{\times}10^{-10}cm^3(STP)cm/cm^2{\cdot}s{\cdot}cmHg$) and $O_2/N_2$ selectivity of 14.

• Journal of Sensor Science and Technology
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• v.16 no.6
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• pp.462-466
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• 2007

Aluminum nitride (AlN) thin films were deposited on Si substrates by using polycrystalline (poly) 3C-SiC buffer layers, in which the AlN film was grown by pulsed reactive magnetron sputtering. Characteristics of grown AlN films were investigated experimentally by means of FE-SEM, X-ray diffraction, and FT-IR, respectively. The columnar structure of AlN thin films was observed by FE-SEM. X-ray diffraction pattern proved that the grown AlN film on 3C-SiC layers had highly (002) orientation with low value of FWHM (${\Theta}=1.3^{\circ}$) in the rocking curve around (002) reflections. These results were shown that almost free residual stress existed in the grown AlN film on 3C-SiC buffer layers from the infrared absorbance spectrum. Therefore, the presented results showed that AlN thin films grown on 3C-SiC buffer layers can be used for various piezoelectric fields and M/NEMS applications.

• Journal of Sensor Science and Technology
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• v.13 no.4
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• pp.264-269
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• 2004

This paper describes on an advanced technology of 3C-SiC/Si(100) wafer direct bonding using PECVD oxide to intermediate layer for SiCOI(SiC-on-Insulator) structure because it has an attractive characteristics such as a lower thermal stress, deposition temperature, more quick deposition rate and higher bonding strength than common used poly-Si and thermal oxide. The PECVD oxide was characterized by ATR-FTIR. The bonding strength with variation of HF pre treatment condition was measured by tensile strength measurement system. After etch-back using TMAH solution, roughness of 3CSiC surface crystallinity and bonded interface was measured and analyzed by AFM, XRD, and SEM respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.70-70
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• 1999

현재 TFT-LCD에서 주류를 이루고 있는 a-Si 으로는 SXGA급 이상의 LCD를 구현하는 데 그 자체 이동도(0.4~1.0cm2/Vs)의 한계 때문에 poly-Si(100~300cm2/Vs)을 사용하지 않을 수 없다. Poly-Si을 성장시키는 방법으로는 PECVD 방법, SPC 방법, Laser Annealing 방법등이 있으나 아직 이 모든 방법으로는 성장박막의 질, 즉 이동도, 균일성 등이 만족스럽지 못하다. 그 중에서 Laser Annealing 방법으로 저온에서 가장 좋은 막질을 얻고 있으나 균일성 및 생산성 향상면에서 여려움이 제기되고 있다. 따라서 차세대 TFT-LCD의 핵심소재인 poly-Si을 저온에서 유리기판위에 양질의 박막으로 성장시킬 수 있는 박막성장법이 절실하다. 본 연구에서 사용된 실리콘 이온 증착법은 Sidl 이온 상태로 직접 증착되므로 이온 에너지가 직접 결합에 기여하게 되고 동시에 이온 에너지는 전기적으로 제어되므로 박막 형성에 필요한 정정 에너지를 공급할 수 있다. 따라서 종래의 열에너지만을 이용한 방법보다 훨씬 낮은 온도에서 박막을 성장시킬 수 있었다. 3kV의 Cs+에 의해 sputter 된 Si beam- 에너지를 20~100eV, Si- flux를 약 4$\mu$A.cm2로 조절하며, 기판온도 300~45$0^{\circ}C$에서 각각 제조하였다. 30$0^{\circ}C$, 20~50eV에서 poly-Si임을 XRD 분석으로 확인 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.55.2-55
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• 1998

다견정 심리판-거l르마늄(JXlly-SiGe)은 TFT(thin-film transistor)와 갇븐 소자 응용에 있어서 중요한 불칠이다 .. LPCVD (low pressure chemical vapor deposition) 방법으로 비정칠 SiGc (a-SiGe) 박막올 증 착시키고 고상결정화(SPC: solid-phase crystallization)시켜 poly-SiGc옹 얻는 것은 잘 알려져 있다. 그러 나 그러나 PF'||'&'||'pound;VD-SPC 방법올 이용한 poly-SiGc의 제조에 대해서는 아직 두드러지게 연구된 바 없다. 우리단 PF'||'&'||'pound;VD 방법으로 a-SiGc 박막올 증착시키고 고상캘정화시켜 poly-SiGc올 얻었 R며, :~ 결정성, G Gc 농도, 결정핍의 평끌 크기 눔올 XRD (x-ray diffraction) 방법으호 조사하였다. 특히 pr'||'&'||'pound;VD 증착시 가판온도,Gc 함유량 등이 고상화에 미치는 영향에 대해서 조사하였다. P PECVD 장치는 터보펌프콸 사용하여 71저진공이 2xlOlongleftarrow5 Torr에 이르렀다. 가판윤 SiOOO) 웨이퍼륜 사용하고 기판 온도는 약 150- 35()"C 사이에서 변화되었다. 증착가스는 SiH4, GcH4, 112 등흘 썼다. 증착 압력과 r.f 전력용 각각 O.25ToIT와 3W로 일정하게 하였다 .. Gc 함유량(x)은 x x=O.O-O.5 사이에서 변화되었다 .. PECVD모 증착된 SiGc 박막들은 고상결정화를 위해 $\theta$X)"(:: Nz 분위기에서 24시간동안, 혹은 5OO'C에서 4열간 가열되었다. 고상결정화 후 poly-SiGc 박막은 SiGc(Ill), (220), (311) XRD 피크들올 보여주었으며, 각 피 크들은 poly-Si에 비하여 왼쪽으로 Bragg 각이 이동되었고, Vegard’slaw에 의해서 x의 값올 확 인할 수 있었다. 이것온 RBS 결과와 열치하였다. 약 150-350'C 사이에서 변화된 기판온도의 범위 에서 증착온도가 낮올수콕 견정립의 크기는 대체로 증가하는 것으로 나타났다 .. XHD로 추정된 형 균 결정립의 크기는 최대 약 3$\alpha$1m 정도였다. 또한 같끈 샘플뜰에 대해서 기판온도가 낮올수록 증착속도가 증가함옴 확인하였다 .. Gc 함유량이 x=O.1에서 x=O.5로 증가함에 따라서도 결정립의 크기와 SiGc 증착속도는 증가하는 것으로 나타났다 .. Hwang [1] , Kim[2] 둥의 연구자들은 Gc 함유 량이 증가함에 따라 결정 립 크기가 캄소하는 것올 보고하였으냐, Tsai [3] 둥은 반대의 결과플 보 고하고 Ge 힘유량의 증가시 결정립 크기의 증가에 대해 Gc의 Si보다 낮은 융점 (melting point) 올 강조한 바 있다. 결정립 크기의 증가는 대체로 SiGe 중착속도의 증가와도 관련이 있음올 볼 때, poly-SiGc의 경우에도 polv-Si의 고상화에서와 같이 증착속도가 빠를수록 최종적언 결정럽의 크기가 커지는 것으로 이해될 수도 있다 .. PECVD 증착시 증착속도의 증가는 증착된 박딱에서의 무켈서도를 증 가시킬 수 있음올 고려하면, 이라한 결파플온 p이y-SiGc의 고상결정화에서도 ploy-Si의 고상결정 화에서와 마찬가지로 초기 박막에서의 구조직 무절서도가 클수록, 고상결정화 후 결정 립의 크기 가 커칠 수 있음올 보여준다고 생각휠 수 있다,

• Journal of the Korean Ceramic Society
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• v.30 no.1
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• pp.55-61
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• 1993

In the WSi2/CVD-Si/SiO2 polycide structure, electrode resistance and its property were studied as a function of deposition temperature and thickness of CVD-Si, diffusion condition of POCl3, and WSi2 being deposited or not. Resistivity of poly-Si is decreased with increment of thickness in the case of POCl3 diffusion of low sheet resistance, but it is increased in the case of high sheet resistance. The resistivity of amorphous-Si is generally lower than that of poly-Si. Initial sheet resistance of poly-Si/WSi2 gate electrode is affected by the thickness and resistance of poly-Si layer, but final resistance after anneal, 900$^{\circ}C$/30min/N2, is only determined by WSi2 layer. Flourine diffuses into SiO2, but tungsten does not. In spite of out-diffusion of phosphorus into WSi2 layer, the sheet resistance is not changed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.252-252
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• 2008

The microhotplates consisting of a Pt-ased heating element on AlN/poly 3C-SiC layers were fabricated. The microhotplate has a $600{\mu}m{\times}600{\mu}m$ square shaped membrane which made of $1{\mu}m$ thick ploycrystalline 3C-SiC suspended by four legs. 3C-SiC is known for excellent chemical durability, mechanical strength and sustaining of high temperature. The membrane is fabricated by surface micromachining using oxidized Si sacrificial layer. The Pt thin film is used for heating material and resist temperature sensor. The fabrication methodology allows intergration of an array of heating material and resist temperature detector. For reasons of a short response time and a high sensitivity a uniform temperature profile is desired. The dissipation of microhotplate was examined by a IR thermoviewer and the power consumption was measured. Measured and simulated results are compared and analyzed. Thermal characterization of the microhotplates shows that significant reduction in power consumption was achieved using suspended structure.

• Korean Journal of Materials Research
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• v.24 no.9
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• pp.443-450
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• 2014

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.