• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.368-369
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• 2008

This paper describes the mechanical properties of poly(polycrystalline) 3C-SiC thin film with various doping concentration, in which poly 3C-SiC thin film's mechanical properties according to the n-doping concentration 1%$(9.2\times10^{15}cm^{-3})$, 3%$(5.2\times10^{17}cm^{-3})$, and 5%$(6.8\times10^{17}cm^{-3})$ respectively was measured by nano indentation. In the case of $9.2\times10^{15}^{-3}$ n-doping concentration, Young's Modulus and hardness were obtained as 270 GPa and 30 GPa, respectively. When the surface roughness according to n-doping concentrations was investigated by AFM(atomic force microscope), the roughness of poly 3C-SiC thin film doped by 5% concentration was 15 nm, which is also the best of them.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.113-113
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• 2009

This paper describes the characteristics of a poly 3C-SiC micro heater which was fabricated on $AlN(0.1{\mu}m)/3C-SiC(1.0{\mu}m)$ suspended membranes by surface micro- machining technology. The 3C-SiC and AlN thin films which have wide energy bandgap and very low lattice mismatch were used sensors for high temperature and voltage environments. The 3C-SiC thin film was used as micro heaters and temperature sensor materials simultaneously. The implemented 3C-SiC RTD (resistance of temperature detector) and the power consumption of micro heaters were measured and calculated. The TCR (thermal coefficient of the resistance) of 3C-SiC RTD is about -5200 $ppm/^{\circ}C$ within a temperature range from $25^{\circ}C$ to $50^{\circ}C$ and -1040 $ppm/^{\circ}C$ at $500^{\circ}C$. The micro heater generates the heat about $500^{\circ}C$ at 10.3 mW. Moreover, durability of 3C-SiC micro heaters in high voltages is better than pt micro heaters. A thermal distribution measured and simulated by IR thermovision and COMSOL is uniform on the membrane surface.

• 센서학회지
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• 제18권4호
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• pp.311-315
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• 2009

This paper describes the characteristics of a poly 3C-SiC micro heater which was fabricated on AlN(0.1 $\mu$m)/3C-SiC(1.0 $\mu$m) suspended membranes by surface micro-machining technology. The 3C-SiC and AlN thin films which have wide energy band gap and very low lattice mismatch were used sensors for high temperature and voltage environments. The 3C-SiC thin film was used as micro heaters and temperature sensor materials simultaneously. The implemented 3CSiC RTD(resistance of temperature detector) and the power consumption of micro heaters were measured and calculated. The TCR(thermal coefficient of the resistance) of 3C-SiC RTD is about -5200 ppm/$^{\circ}C$ within a temperature range from 25 $^{\circ}C$ to 50 $^{\circ}C$ and -1040 ppm/$^{\circ}C$ at 500 $^{\circ}C$. The micro heater generates the heat about 500 $^{\circ}C$ at 10.3 mW. Moreover, durability of 3C-SiC micro heaters in high voltages is better than Pt micro heaters. A thermal distribution measured and simulated by IR thermovision and COMSOL is uniform on the membrane surface.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.195-196
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• 2009

This paper describes the fabrication and characteristics of polycrystalline 3C-SiC thin film diodes for extreme environment applications, in which the this thin film was deposited onto oxidized Si wafers by APCVD using HMDS In this work, the optimized growth temperature and HMDS flow rate were $1,100^{\circ}C$ and 8sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/$SiO_2$/Si(n-type) structure was fabricated and its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84V, over 140V, 61nm, and $2.7{\times}10^{19}cm^2$, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and $500^{\circ}C$ for 30min under a vacuum of $5.0{\times}10^{-6}$Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2010년도 춘계학술발표대회
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• pp.58.1-58.1
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• 2010

We have developed a novel crystallization process, where the crystallization temperature is lowered compared to the conventional RTA process and the metal contamination is lowered compared to the conventional VIC process. A very-thin a-Si film was deposited and crystallized at $550^{\circ}C$ for 3 h by the VIC process and then a thick a-Si film was deposited and crystallized by the RTA process at $680^{\circ}C$ for 5 min using the VIC poly-Si layer as a crystallization seed layer. The RTA crystallized temperature could be lowered up to $50^{\circ}C$, compared to RTA process alone. The poly-Si film appeared a needle-like growth front and relatively well-arranged (111) orientation. In addition, the Ni concentration in the poly-Si film was lowered to $3{\times}10^{17}\;cm^{-3}$ and that at the poly-Si/$SiO_2$ interface was lowered to $5{\times}10^{19}\;cm^{-3}$. The reduction in metal contamination could be greatly helpful to achieve a low leakage current in poly-Si TFT, which is the critical parameter for commercialization of AMOLED.

• Transactions on Electrical and Electronic Materials
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• 제9권3호
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• pp.101-104
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• 2008

The electrical properties and microstructure of nitrogen-doped poly 3C-SiC films were studied according to different thickness. Poly 3C-SiC films were deposited by LPCVD(low pressure chemical vapor deposition) at $900^{\circ}C$ and 4 Torr using $SiH_2Cl_2$ (100 %, 35 sccm) and $C_2H_2$ (5 % in $H_2$, 180 sccm) as the Si and C precursors, and $NH_3$ (5 % in $H_2$, 64 sccm) as the dopant source gas. The resistivity of the 3C-SiC films with $1,530{\AA}$ of thickness was $32.7{\Omega}-cm$ and decreased to $0.0129{\Omega}-cm$ at $16,963{\AA}$. In XRD spectra, 3C-SiC is so highly oriented along the (1 1 1) plane at $2{\theta}=35.7^{\circ}$ that other peaks corresponding to SiC orientations are not presented. The measurement of resistance variations according to different thickness were carried out in the $25^{\circ}C$ to $350^{\circ}C$ temperature range. While the size of resistance variation decreases with increasing the films thickness, the linearity of resistance variation improved.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.354-357
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• 2002

Thermally grown gate oxide on 4H-SiC wafer was investigated. The oxide layers were grown at l150$^{\circ}C$ varying the carrier gas and post activation annealing conditions. Capacitance-Voltage(C-V) characteristic curves were obtained and compared using various gate electrode such as Al, Ni and poly-Si. The interface trap density can be reduced by using post oxidation annealing process in Ar atmosphere. All of the samples which were not performed a post oxidation annealing process show negative oxide effective charge. The negative oxide effective charges may come from oxygen radical. After the post oxidation annealing, the oxygen radicals fixed and the effective oxide charge become positive. The effective oxide charge is negative even in the annealed sample when we use poly silicon gate. Poly silicon layer was dope by POCl$_3$ process. The oxide layer may be affected by P ions in poly silicon layer due to the high temperature of the POCl$_3$ doping process.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.13-16
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• 2009

In this study, AlN thin films were deposited on a polycrystalline (poly) 3C-SiC buffer layer for surface acoustic wave (SAW) applications using a pulsed reactive magnetron sputtering system. AFM, XRD and FT-IR were used to analyze structural properties and preferred orientation of the AlN/3C-SiC thin film. Suitability of the film in SAW applications was investigated by comparing the SAW characteristics of an interdigital transducer (IDT)/AlN/3C-SiC structure with the IDT/AIN/Si structure at 160 MHz in the temperature range $30-150^{\circ}C$. These experimental results showed that AlN films on the poly 3C-SiC layer were highly (002) oriented. Furthermore, the film showed improved temperature stability for the SAW device, $TCF\;=\;-18\;ppm//^{\circ}C$. The change in resonance frequency according to temperature was nearly linear. The insertion loss decrease was about $0.033dB/^{\circ}C$. However, some defects existed in the film, which caused a slight reduction in SAW velocity.

• 전자공학회논문지D
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• 제34D권4호
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• pp.33-39
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• 1997

The crystallization temperature of an amorphous silicon (a-Si) can be lowered down to 400.deg. C by a new method : Double-metal induced lateral crystallization (DMILC). The a-Si film was laterally crystallized from Ni and Pd deposited area, and its lateral crystallization rate reaches up to 0.2.mu.m/hour at that temperature and depends on the overlap length of Ni and Pd films; the shorter the overlap length, the faster the rate. Poly-Silicon thin film transistors (poly-Si TFT's) fabricated by DMILC at 400.deg. C show a field effect mobility of 38.5cm$^{3}$/Vs, a minimum leakage current of 1pA/.mu.m, and a slope of 1.4V/dec. The overlap length does not affect the characteristics of the poly-Si TFT's, but determines the lateral crystallization rate.

• 한국세라믹학회지
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• 제31권1호
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• pp.74-78
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• 1994

Degradation of thin oxide by doped poly-Si and its improvement were studied. The gate oxide can be degraded by phosphorous in poly-Si doped POCl3. The degradation is increased with the decrement of sheet resistance and poly-Si thickness. Oxide failures of amorphous-Si are higher than those of poly-Si. In-situ double deposition of amorphous-Si, 54$0^{\circ}C$/30 nm, and poly-Si, 6$25^{\circ}C$/220 nm, forms the mismatch structure of grain boundary between amorphous-Si and poly-Si, and suppresses the excess phosphorous on oxide surface by the mismatch structure. The control of phosphorous through grain boundary improves the oxide reliability.