• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.3
• /
• pp.565-571
• /
• 2010

This paper proposes a parity discrimination algorithm which discriminates N bit parity using a perceptron neural network and back propagation algorithm. This algorithm decides minimum hidden unit numbers when discriminates N bit parity. Therefore, this paper implements parity discrimination experiments for N bit by changing hidden unit numbers of the proposed perceptron neural network. Experiments confirm that the proposed algorithm is possible to discriminates N bit parity.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.5
• /
• pp.445-454
• /
• 2015

As the feature sizes and the operating charges continue to be scaled down, multi-bit soft errors are becoming more critical in SRAM designs of a few nanometers. In this paper, we propose an efficient error detection technique to reduce the size of parity bits by applying a 2D bit-interleaving technique to 3D bit-partitioned SRAM devices. Our proposed bit-interleaving technique uses only 1/K (where K is the number of dies) parity bits, compared with conventional bit-interleaving structures. Our simulation results show that 1/K parity bits are needed with only a 0.024-0.036% detection error increased over that of the existing bit-interleaving method. It is also possible for our technique to improve the burst error coverage, by adding more parity bits.

• Proceedings of the Korea Society for Industrial Systems Conference
• /
• 1997.11a
• /
• pp.137-146
• /
• 1997

The simplest bit error detection scheme is to append a parity bit to the end of a bit sequence. In this paper an error correction technique with the use of a parity bit is proposed, and the performance of the proposed system is analyzed. The error probability of the proposed system is compared with the output of computer simulation of the proposed system. It is also compared with the error probability of error at BPSK system, and the signal-to-noise ratio gain is showed.

• Korean Journal of Optics and Photonics
• /
• v.14 no.2
• /
• pp.150-154
• /
• 2003

In this paper, we introduce modified parity coding methods to reduce the errors caused by spatial beam intensity variations in a holographic data storage system. We explained the encoding and decoding process of the conventional parity coding and the modified parity coding techniques. We compared the bit-error-rate (BER) performances of the conventional parity coding and the modified parity coding techniques from experimental evaluation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.11C
• /
• pp.1030-1036
• /
• 2006

In this paper, we present two methods of correcting bit errors in constant amplitude multi-code (CAMC) CDMA, which uses the redundant bits only. The first method is a parity-based bit correction with hard-decision, where the received signals despread into n two-dimensional structure with both horizontal parity and vertical parity. Then, an erroneous bit is corrected for each $4{\times}4$ pattern. The second method is a turbo decoding, which is modified from the decoding of a single parity check product code (SPCPC). Experimental results show that, in the second method, the redundant bits in CAMC can be fully used for the error correction and so they are not really a loss of channel bandwidth. Hence, CAMC provides both a low peak-to-average power ratio and robustness to bit errors.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.10a
• /
• pp.161-162
• /
• 2011

Recently, many research works are focusing on DVC (Distributed Video Coding) system for low complexity encoder. However the feedback channel-based parity bit control is a major cause of the high decoding time latency. Spatial and temporal correlation is high in video and, therefore, the statistical property can be applied for the parity bit request of LDPCA frame. By introducing frame adaptive parity bit request estimation method, this paper proposes a new method for reducing the decoding time latency. Through computer simulations, it is shown that the proposed method achieves about 80% of complexity reduction, compared to the conventional no-estimation method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2012.10a
• /
• pp.107-108
• /
• 2012

For low complexity encoder, the parity bit transmission through a feedback channel is an essential part of DVC. But feedback channel-based parity bit control is a major cause for the high decoding time latency. In this paper, we propose a fast distributed video decoding by parity bit request estimation using rate-distortion model. Through computer simulations, it is shown that the proposed method can achieve complexity reduction compared to other methods.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.1
• /
• pp.128-136
• /
• 2008

In this paper, we propose a new cache structure for effective error correction of soft error. We added check bit and SEEB(soft error evaluation block) to evaluate the status of cache line. The SEEB stores result of parity check into the two-bit shit register and set the check bit to '1' when parity check fails twice in the same cache line. In this case the line where parity check fails twice is treated as a vulnerable to soft error. When the data is filled into the cache, the new replacement algorithm is suggested that it can only use the valid block determined by SEEB. This structure prohibits the vulnerable line from being used and contributes to efficient use of cache by the reuse of line where parity check fails only once can be reused. We tried to minimize the side effect of the proposed cache and the experimental results, using SPEC2000 benchmark, showed 3% degradation in hit rate, 15% timing overhead because of parity logic and 2.7% area overhead. But it can be considered as trivial for SEEB because almost tolerant design inevitably adopt this parity method even if there are some overhead. And if only parity logic is used then it can have $5%{\sim}10%$ advantage than ECC logic. By using this proposed cache, the system will be protected from the threat of soft error in cache and the hit rate can be maintained to the level without soft error in the cache.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.2
• /
• pp.259-265
• /
• 2012

Recently, many research works are focusing on DVC (Distributed Video Coding) system for low complexity encoder. Most DVC systems need feedback channel for parity bit control to achieve the good RD performances, however, this causes the system to have high decoding latency and is considered as one of the most critical problems for real implementation. In order to overcome this problem, this paper proposes an effective distributed video decoding method using adaptive LDPCA frame-based parity bit request estimation. The proposed method applies for the pixel-domain Wyner-Ziv system and exploits the statistical characteristics between adjacent LDPCA frames to estimate adaptively the parity bit request. Through computer simulations, it is shown that the proposed method achieves about 80% of latency reduction compared to the conventional no-estimation DVC system.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.156-163
• /
• 2012

Recently, Information Hiding Technology are becoming increasingly demanding in the field of international security, military and medical image This paper proposes data hiding technique utilizing parity checker for gray level image. many researches have been adopted LSB substitution and XOR operation in the field of steganography for the low complexity, high embedding capacity and high image quality. But, LSB substitution methods are not secure through it's naive mechanism even though it achieves high embedding capacity. Proposed method replaces LSB of each pixel with XOR(between the parity check bit of other 7 MSBs and 1 Secret bit) within one pixel. As a result, stego-image(that is, steganogram) doesn't result in high image degradation. Eavesdropper couldn't easily detect the message embedding. This approach is applying the concept of symmetric-key encryption protocol onto steganography. Furthermore, 1bit of symmetric-key is generated by the self-reference of each pixel. Proposed method provide more 25% embedding rate against existing XOR operation-based methods and show the effect of the reversal rate of LSB about 2% improvement.