• 인포메이션 디스플레이
• /
• 제9권1호
• /
• pp.9-15
• /
• 2008

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.273.2-273.2
• /
• 2014

Sputtering process has been widely used in Si-based semiconductor industry and it is also an ideal method to deposit transparent oxide materials for thin-film transistors (TFTs). The oxide films grown at low temperature by conventional RF sputtering process are typically amorphous state with low density including a large number of defects such as dangling bonds and oxygen vacancies. Those play a crucial role in the electron conduction in transparent electrode, while those are the origin of instability of semiconducting channel in oxide TFTs due to electron trapping. Therefore, post treatments such as high temperature annealing process have been commonly progressed to obtain high reliability and good stability. In this work, the scheme of electron-assisted RF sputtering process for high quality transparent oxide films was suggested. Through the additional electron supply into the plasma during sputtering process, the working pressure could be kept below $5{\times}10-4Torr$. Therefore, both the mean free path and the mobility of sputtered atoms were increased and the well ordered and the highly dense microstructure could be obtained compared to those of conventional sputtering condition. In this work, the physical properties of transparent oxide films such as conducting indium tin oxide and semiconducting indium gallium zinc oxide films grown by electron-assisted sputtering process will be discussed in detail. Those films showed the high conductivity and the high mobility without additional post annealing process. In addition, oxide TFT characteristics based on IGZO channel and ITO electrode will be shown.

• ETRI Journal
• /
• 제34권6호
• /
• pp.966-969
• /
• 2012

From a practical viewpoint, the topic of electrical stability in oxide thin-film transistors (TFTs) has attracted strong interest from researchers. Positive bias stress and constant current stress tests on indium-gallium-zinc-oxide (IGZO)-TFTs have revealed that an IGZO-TFT with a larger Ga portion has stronger stability, which is closely related with the strong binding of O atoms, as determined from an X-ray photoelectron spectroscopy analysis.

• 한국전기전자재료학회논문지
• /
• 제33권1호
• /
• pp.6-9
• /
• 2020

Thin film transistors (TFTs) with large-area, high mobility, and high reliability are important factors for next-generation displays. In particular, thin transistors based on IGZO oxide semiconductors are being actively researched for this application. In this study, several methods for improving the reliability of a-IGZO TFTs by applying various materials on a passivation layer are investigated. In the literature, inorganic SiO₂, TiO₂, Al₂O₃, ZTSO, and organic CYTOP have been used for passivation. In the case of Al₂O₃, excellent stability is exhibited compared to the non-passivation TFT under the conditions of negative bias illumination stress (NBIS) for 3 wavelengths (R, G, B). When CYTOP passivation, SiO₂ passivation, and non-passivation devices were compared under the same positive bias temperature stress (PBTS), the Vth shifts were 2.8 V, 3.3 V, and 4.5 V, respectively. The Vth shifts of TiO₂ passivation and non-passivation devices under the same NBTS were -2.2 V and -3.8 V, respectively. It is expected that the presented results will form the basis for further research to improve the reliability of a-IGZO TFT.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
• /
• pp.204.1-204.1
• /
• 2015

We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

• 전자공학회논문지A
• /
• 제32A권8호
• /
• pp.126-132
• /
• 1995

The electrical stress of short channel polycrystalline silicon (poly-Si) thin film transistor (TFT) has been investigated. The device characteristics of short channel poly-Si TFT with 5$\mu$m channel length has been observed to be significantly degraded such as a large shift in threshold voltage and asymmetric phenomena after the electrical stress. The dominant degradation mechanism in long channel poly-Si TFT's with 10$\mu$m and 20$\mu$m channel length respectively is charage trappling in gate oxide while that in short channel device with 5.mu.m channel length is defect creation in active poly-Si layer. We propose that the increased defect density within depletion region near drain junction due to high electric field which could be evidenced by kink effect, constitutes the important reason for this significant degradation in short channel poly-Si TFT. The proposed model is verified by comparing the amounts of the defect creation and the charge trapping from the strechout voltage.

• 한국진공학회지
• /
• 제1권1호
• /
• pp.212-222
• /
• 1992

To use polycrystalline Si Thin Film Transistor (poly-Si TFT) in high density SRAM instead of High Load Resistor (HLR), TFT is needed to show good electrical characteristics such as large carrier mobility, low leakage current, high driver current and low subthreshold swing. To satisfy these electrical characteristics, the trap state density must be reduced in the channel poly. Technological issues pertinent to the channel poly fabrication process are investigated and discussed. They are solid phase growth (SPG), Si-ion implantation, laser annealing and hydrogenation. The electrical properties of several CVD oxides used as the gate oxide of TFT are compared. The dependence of the electrical characteristics of TFT on source-drain ion-implantation dose, drain offset length and dopant lateral diffusion are also described.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.369-369
• /
• 2012

본 연구에서는 투명한 산화물반도체 a-IGZO 박막을 채널층로 사용하여 박막형트랜지스터를 제작하였고, 이를 이용하여 증가 및 공핍모드를 가지는 인버터소자를 제작하였다. 제작된 인버터는 4인치 유리기판위에 게이트, 채널 그리고 소스/드레인 영역을 스퍼터링방식으로 증착하였고, PECVD를 사용하여 SiNx 절연막을 증착하였다. 또한 투명소자에 응용하기위해 게이트, 소스, 드레인 영역을 투명한 a-IZO 박막으로 증착하였다. 제작된 인버터의 특성은 높은 전압이득과, 잡음여유를 가짐으로써 투명소자회로에서 다양한 응용 가능성을 보였다.

• 한국표면공학회:학술대회논문집
• /
• 한국표면공학회 2013년도 춘계학술대회 논문집
• /
• pp.138-139
• /
• 2013

본 연구는 ZnO-TFT 소자에 Hf의 첨가에 따른 소자 특성 및 게이트 바이어스 스트레스에 대한 특성에 대해 분석을 하였다. Hf-Zn-O 박막은 Hf의 조성이 증가함에 따라 작아지는 grain size로 인해 TFT 소자의 전계효과 이동도와 게이트 바이어스 스트레스에서의 문턱전압의 변화가 더 커지는 것을 확인하였다. 한편, Hf이 14at% 함유된 HZO-TFT에서는 이동도는 현저히 저하되었지만, 게이트 바이어스 스트레스에서의 문턱전압의 변화가 현저히 개선되는 것을 확인하였는데, 이는 Hf의 조성이 증가함에 따라 비정질화 되어 grain boundaries에 의한 trap의 영향이 줄어든 결과를 확인하였다. 또한, 전계효과 이동도와 소자의 안정성을 확보하기 위해, poly-ZnO와 amorphous-HZO로 구성된 다중층 채널 구조를 이용한 TFT소자에서는 전계효과 이동도과 소자의 안정성이 개선된 결과를 보였다. 이는 채널과 게이트 산화물의 interface charge trap의 감소와 back-channel effect가 감소한 결과임을 확인하였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2000년도 하계학술대회 논문집 C
• /
• pp.1751-1753
• /
• 2000

다결정 실리콘 박막 트랜지스터 (poly-Si TFT)의 누설전류를 억제하기 위해 게이트 절연막(gate oxide)의 가장자리에 캐비티(cavity)를 가지는 새로운 구조의 다결정 박막 트랜지스터를 제안하였다. 캐비티는 드레인(drain) 공핍영역(depletion region) 위에 형성되어 드레인 주변에 유도되는 수직전계를 감소시켜 누설전류를 억제하고 소자의 안정성을 향상시킬 수 있다. 본 연구에서 제작된 poly-Si TFT는 기존의 TFT에 비해 온-오프 전류비가 향상되었고 전기적 스트레스 후의 문턱전압 변화가 작음을 확인하였다.