• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.4
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• pp.167-175
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• 2020

A blood-glucose meter is one of the in vitro diagnostic devices to measure and control the glucose concentration of diabetics. In order to measure the glucose level in the blood, the common method is to measure the amount of electrons, that is, the output current generated by glucose oxidation after a blood sample is inserted into the test strip containing an enzyme. The hematocrit is an obstacle in measuring accurate blood glucose concentration. This paper deals with the design and implementation of a blood-glucose meter to correct the hematocrit interference. We propose a sequential method which measures impedance using the alternating current and then measures glucose in the blood using the direct current. In addition, this paper introduces how to use commercial glucose strips based on the proposed system. Finally, we conducted the performance evaluation of the proposed system by comparing the measured current and impedance with those of the references. As a result, the standard deviation of the current measurement is approximately 0.6nA and the impedance measurement error for measuring the hematocrit is approximately within 1%. The proposed system will improve the accuracy of the conventional blood-glucose meter by reducing the hematocrit interference.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.1
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• pp.110-118
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• 2004

In this paper, a method is presented for the design of an orthomode transducer(OMT) operating at 21/31GHz frequency bands. A square waveguide is used in the common port while the WR-34 standard rectangular waveguide is used in the straight port. The straight port is connected to the common port via a multi-stage quarter-wave impedance transformer. The side port is coupled to the common port through a slot formed along the center line of the common square waveguide. An impedance transformer is employed to match the impedance of the coupling slot with that of the WR-51 waveguide at the output of the side port. Dimensions of the OMT are iteratively optimized employing the theory of waveguide. The validity of the proposed method is verified by fabricating and testing the designed orthomode transducer.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1870-1872
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• 2005

In this study, an ultrasonic level limit sensor with a new structure utilizing the acoustic impedance matching is proposed to be able to check it out a change of water-level. 2 PZT resonators with the same property are bonded directly on the polyethylene plate. One resonator is for transmitter as an ultrasonic transducer, the other one is for receiver. In this case, a polyethylene plate will operate as an acoustic guider to transmit a transverse wave between 2 PZT resonators in air. While in the water, a polyethylene plate having a similar acoustic impedance with the water will be emitted an acoustic energy into the water as a longitudinal wave. According to this mechanism, there was a wide difference of acoustic signal output between underwater and in air. As a summary, this proposed level limit sensor could be used as a strong candidate with low cost and more stable one.

• Journal of IKEEE
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• v.25 no.4
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• pp.650-663
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• 2021

Subsurface topology estimation is an important factor in the geophysical survey. Electrical impedance tomography is one of the popular methods used for subsurface imaging. The EIT inverse problem is highly nonlinear and ill-posed; therefore, reconstructed conductivity distribution suffers from low spatial resolution. The subsurface region can be approximated as piece-wise separate regions with constant conductivity in each region; therefore, the conductivity estimation problem is transformed to estimate the shape and location of the layer boundary interface. Each layer interface boundary is treated as an open boundary that is described using front points. The subsurface domain contains multi-layers with very complex configurations, and, in such situations, conventional methods such as the modified Newton Raphson method fail to provide the desired solution. Therefore, in this work, we have implemented a 7-layer artificial neural network (ANN) as an inverse problem algorithm to estimate the front points that describe the multi-layer interface boundaries. An ANN model consisting of input, output, and five fully connected hidden layers are trained for interlayer boundary reconstruction using training data that consists of pairs of voltage measurements of the subsurface domain with three-layer configuration and the corresponding front points of interface boundaries. The results from the proposed ANN model are compared with the gravitational search algorithm (GSA) for interlayer boundary estimation, and the results show that ANN is successful in estimating the layer boundaries with good accuracy.

• Proceedings of the KIPE Conference
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• 2013.11a
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• pp.105-106
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• 2013

This paper proposes a new topology with active switched-capacitor and switched-inductor impedance network, which can obtain a high boost factor with small shoot-through time. The proposed topology uses an active switched capacitor and switched-inductor impedance network in order to couple the main circuit and input dc source for boosting the output voltage. The proposed topology contains all advantages of the classical Z-source inverter. Comparing with other topologies, the proposed topology uses lesser component and the voltage boost inversion ability significantly increases. The theoretical analysis, pulse width modulation control strategies, and a comparison with classical ZSI have been given in this paper. Both simulation and experimental results will be presented to verify the advantages of the proposed topology.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.7
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• pp.272-277
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• 1986

The system that follows to the resonance frequency of high frequency MOSFET inverter and varies according to the changes of load characteristics is proposed. Also we suggested a method how to select the resonant load type between series and parallel circuit for a given inverter type. It leads to the conclusion that in the case of high impedance loads, parallel resonant circuits are preferable, on the other hand, for low impedance loads, series resonant circuits are more preferable. For frequency tracking, a PLL circuit is used as main control element to detect the phase difference of current and voltage of load. The realized apparatus composed of control circuit and voltage type full-bridged MOSFET elements as main parts of inverter. A stable frequency follow-up characteristics are obtained for 1.2MHz, 1.5KW high frequency output and power is always supplied to the load with unity power factor.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.652-655
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• 2003

In this paper, step-down piezoelectric transformer is studied. The piezoelectric transformer, made of lead zirconate titanate solid solution ceramic, is operated by a fundamental contour-extensional vibration mode. The transformer of 14mm length, 14mm width and 4.5mm thickness was made up two shape(Type I and II). The resonant frequency (fr) is 144kHz and 128kHz at the load resistant of $7.5{\Omega}$ that is a similar to calculating matching impedance. The gain (G) obtained 0.19 and 0.08 at each resonant frequency, when applied input voltage is 25V. The temperature difference with the variation of load resistant was increased with increasing load resistant and was the lowest at $7.5{\Omega}$ near the matching of output impedance.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.19-26
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• 1997

Novel class AB CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well CMOS process for high-frequency current-mode signal processing were developed. The CCII for low power operation consists of a class AB push-pull stage for the current input, a complementary source follower for the voltage input, and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated CCII show that the current input impedance is 875.ohm. and the bandwidth of flat gain when used as a voltage amplifier extends beyond 4MHz. The power dissipation is 1.25mW and the active chip area is 0.2*0.15[mm$\^$2/].

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.1-9
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• 1997

Novel class A CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well standard CMOS process for high-frequency current-mode signal processing were developed. The CCII consists of a regulated current-cell for the voltage input and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated cCII show that the current input impedance is 308 .ohm. and the 3-dB cutoff frequency when used as a voltage amplifier extends beyond 10MHz. The linear dynamic ranges of voltage and current are from -0.5V to 1.5V and from -100.mu.A to +120.mu.A for supply voltage V$\_$DD/ = -V$\_$SS/=2.5V, respectively. The power dissipation is 2 mW and the active chip area is 0.2 * 0.2 [mm$\^$2/].

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.52-61
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• 1996

In this paper, harmonic-tuning method to achieve the maximum efficiency is proposed. Harmonic tuning method is applied to the optimum load impedance of a class B amplifier, which is extracted by using the modified cripps method. High efficiency power amplifier utilizing GaAs MESFET is designed and fabricated in the 835MHz band. The performance of th eamplifier is presented by having output power of 30.8dBm, drain efficiency of 80.5% and power added efficiency of 66% with an associated power gain of 7.4dB.