• 대한전자공학회논문지SD
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• 제41권7호
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• pp.21-29
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• 2004

본 논문에서는 Dual oxide를 갖는 Nano-scale CMOSFET에서 각 소자의 Hot carrier 특성을 분석하여 두 가지 중요한 결과를 나타내었다. 하나는 NMOSFET Thin/Thick인 경우 CHC stress 보다는 DAHC stress에 의한 소자 열화가 지배적이고, Hot electron이 중요하게 영향을 미치고 있는 반면에, PMOSFET에서는 특히 Hot hole에 의한 영향이 주로 나타나고 있다는 것이다. 다른 하나는, Thick MOSFET인 경우 여전히 NMOSFET의 수명이 PMOSFET의 수명에 비해 작지만, Thin MOSFET에서는 오히려 PMOSFET의 수명이 NMOSFET보다 작다는 것이다. 이러한 분석결과는 Charge pumping current 측정을 통해 간접적으로 확인하였다. 따라서 Nano-scale CMOSFET에서의 NMOSFET보다는 PMOSFET에 대한 Hot camel lifetime 감소에 관심을 기울여야 하며, Hot hole에 대한 연구가 진행되어야 한다고 할 수 있다.

• 한국재료학회지
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• 제18권1호
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• pp.5-11
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• 2008

Thermally evaporated 10 nm-Ni/1 nm-Au/(30 nm-poly)Si structures were fabricated in order to investigate the thermal stability of Au-inserted nickel silicide. The silicide samples underwent rapid thermal annealing at $300{\sim}1100^{\circ}C$ for 40 seconds. The sheet resistance was measured using a four-point probe. A scanning electron microscope and a transmission electron microscope were used to determine the cross-sectional structure and surface image. High-resolution X-ray diffraction and a scanning probe microscope were employed for the phase and surface roughness. According to sheet resistance and XRD analyses, nickel silicide with Au had no effect on widening the NiSi stabilization temperature region. Au-inserted nickel silicide on a single crystal silicon substrate showed nano-dots due to the preferred growth and a self-arranged agglomerate nano phase due to agglomeration. It was possible to tune the characteristic size of the agglomerate phase with silicidation temperatures. The nano-thick Au-insertion was shown to lead to self-arranged microstructures of nickel silicide.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.359-361
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• 2003

Nano-porous alumina was investigated as a protecting layer in an AC Plasma Display Panel. A 2 ${\mu}m$ thick nano-porous $Al_2O_3$ layer inserted with MgO was formed on the dielectric layer instead of the conventional 500 nm-thick MgO thin film. Both nano-porous $Al_2O_3$layer and inserted MgO were prepared by wet process. The luminance and luminous efficiency of 3-inch test panel adopting nano-porous $Al_2O_3$ was higher than that of the conventional PDP.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권1호
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• pp.27-31
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• 2008

We have studied nonvolatile memory properties of MOSFETs with double-stacked Si nanoclusters in the oxide-gate stacks. We formed Si nanoclusters of a uniform size distribution on a 5 nm-thick tunneling oxide layer, followed by a 10 nm-thick intermediate oxide and a second layer of Si nanoclusters by using LPCVD system. We then investigated the memory characteristics of the MOSFET and observed that the charge retention time of a double-stacked Si nanocluster MOSFET was longer than that of a single-layer device. We also found that the double-stacked Si nanocluster MOSFET is suitable for use as a dual-bit memory.

• 한국재료학회지
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• 제13권1호
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• pp.18-23
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• 2003

Properties of Ag thick films fabricated by using low temperature curable silver pastes were investigated. Ag pastes were consisted of polymer resins and silver powders. Ag pastes were used for conductive or fixing materials between board and various electrical and electronic devices. Low temperature curable Ag pastes have some advantages over high temperature curable types. In cases of chip mounting, soldering properties were required for screen printed Ag thick films. In this study, four types of Ag pastes were fabricated with different compositions. Screen printed Ag thick films on alumina substrates were fabricated at various curing temperatures and times. Thickness, resistivity, adhesive strength and solderability of fabricated Ag thick films were characterized. Finally, Ag thick films produced using Ag pastes, sample A and B, cured at $150^{\circ}C$ for longer than 6 h and $180^{\circ}C$ for longer than 2 h, and $150^{\circ}C$ for longer than 1 h and $180^{\circ}C$ for 1 h, respectively, showed low resistivities of $10^{-4}$ $∼10^{-5}$ Ωcm and good adhesive strength of 1∼5 Mpa. Soldering properties of those Ag thick films with curing temperatures at solder of 62Sn/36Pb/3Ag were also investigated.

• 한국재료학회지
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• 제29권2호
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• pp.73-78
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• 2019

Lead free $(Ba_{0.7}Ca_{0.3})TiO_3$ thick films with nano-sized grains are prepared using an aerosol deposition (AD) method at room temperature. The crystallinity of the AD thick films is enhanced by a post annealing process. Contrary to the sharp phase transition of bulk ceramics that has been reported, AD films show broad phase transition behaviors due to the nano-sized grains. The polarization-electric hysteresis loop of annealed AD film shows ferroelectric behaviors. With an increase in annealing temperature, the saturation polarization increases because of an increase in crystallinity. However, the remnant polarization and cohesive field are not affected by the annealing temperature. BCT AD thick films annealed at $700^{\circ}C/2h$ have an energy density of $1.84J/cm^3$ and a charge-discharge efficiency of 69.9 %, which is much higher than those of bulk ceramic with the same composition. The higher energy storage properties are likely due to the increase in the breakdown field from a large number of grain boundaries of nano-sized grains.

• 한국전기전자재료학회논문지
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• 제18권12호
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• pp.1075-1079
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• 2005

The Pseudo MOSFET measurements technique has been used for the electrical characterization of the nano SOI wafer. Silicon islands for the Pseudo MOSFET measurements were fabricated by selective etching of surface silicon film with dry or wet etching to examine the effects of the etching process on the device properties. The characteristics of the Pseudo MOSFET were not changed greatly in the case of thick SOI film which was 205 nm. However the characteristics of the device were dependent on etching process in the case of less than 100 nm thick SOI film. The sub 100 nm SOI was obtained by thinning the silicon film of standard thick SOI wafer. The thickness of SOI film was varied from 88 nm to 44 nm by chemical etching. The etching process effects on the properties of pseudo MOSFET characteristics, such as mobility, turn-on voltage, and drain current transient. The etching Process dependency is greater in the thinner SOI wafer.

• Journal of Information Display
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• 제8권2호
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• pp.25-31
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• 2007

MgO thick film for ac-PDPs was formed via electrophoresis deposition process and its effect on luminance and luminance efficiency were evaluated. The electrophoresis deposition process of MgO thick film was optimized through parametric study and defects levels in MgO powders was evaluated using cathodoluminescence spectra measurements. The results demonstrate a possibility of using MgO thick film as electron emission layer for ac-PDPs.

• 한국표면공학회지
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• 제45권1호
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• pp.43-52
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• 2012

Recently, it has been developed for Eco-environment, Super light, Multi-functional nano materials. As needed mobile parts in Smart phone or TV, computer, information communication for high pass signal, multi-function, Magnetic thin film materials have been developed. As last, magnetic powder, sintered and sputtering parts were thick and low purity than electroplating layer, low pass signal and noise were resulted, vibrated TV screen. Because chemical complex temperature was high and ununiform surface layer, it has been very difficult for data pass in High Frequency (GHz) area. Large capacity data pass is used to GHz. Above GHz, signal pass velocity is dependent on Skin Effect of surface layer. If surface layer is thick or ununiform, attachment is poor, low pass signal and cross talk, noise are produced and leaked. It has been reported technical trend of Electrochemically plating and Surface treatment of Metal, Polymer, Ceramic etc. by dispersion/complex for Multi functional nano-magnetic material in this paper.

• 한국세라믹학회지
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• 제48권6호
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• pp.487-492
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• 2011

The effect of the application of lanthanum strontrium manganite and yttria-stabilized zirconia (LSM-YSZ) nano-composite fabricated by pulsed laser deposition (PLD) as a cathode of solid oxide fuel cell (SOFC) is studied. A gradient-structure thin-film cathode composed of 1 micron-thick LSM-YSZ deposited at an ambient pressure ($P_{amb}$) of 200 mTorr; 2 micron-thick LSM-YSZ deposited at a $P_{amb}$ of 300 mTorr; and 2 micron-thick lanthanum strontium cobaltite (LSC) current collecting layer was fabricated on an anode-supported SOFC with an ~8 micron-thick YSZ electrolyte. In comparison with a 1 micron-thick nano-structure single-phase LSM cathode fabricated by PLD, it was obviously effective to increase triple phase boundaries (TPB) over the whole thickness of the cathode layer by employing the composite and increasing the physical thickness of the cathode. Both polarization and ohmic resistances of the cell were significantly reduced and the power output of the cell was improved by a factor of 1.6.