• Journal of applied mathematics & informatics
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• v.20 no.1_2
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• pp.549-556
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• 2006

In this paper, we consider interval-valued Choquet integrals and fuzzy measures. Using these properties, we discuss some applications of them in multicriteria decision aid. In particular, we show how these interval-valued Choquet integrals can model behavioral analysis of aggregation in ulticriteria decision aid.

• Nonlinear Functional Analysis and Applications
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• v.27 no.3
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• pp.499-512
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• 2022

In this paper, we construct an iteration scheme involving a hybrid pair of the Suzuki generalized nonexpansive single-valued and multi-valued mappings in a complete CAT(0) space. In process, we remove a restricted condition (called end-point condition) in Akkasriworn and Sokhuma's results [2] in Banach spaces and utilize the same to prove some convergence theorems. The results in this paper, are analogs of the results of Akkasriworn et al. [3] in Banach spaces.

• Journal of the Korea Computer Industry Society
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• v.3 no.1
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• pp.57-66
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• 2002

In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast Fourier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi-valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like ［0,1,2,3］. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used as LUT(Look Up Table) Finally, for the compatibility with the binary system, multiple-valued hybrid-type FFT processor was proposed and designed using binary-four valued encoder, four-binary valued decoder, and the electric current mode CMOS circuit.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.22-32
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• 2004

In this paper, we proposed MOVAG(Multi Output Value Array Graphs) based on OVAG by Honghai Jiang to construct multiple valued logic function The MDD(Muliple-valued Decision Diagra) needs many processing time and efforts in circuit design for given multi-variable function by D.M.Miller, and we designed a MOVAG which has reduce the data processing time and low complexity. We propose the construction algorithm and input matrix selection algorithm and we designed the multiple-valued logic circuit using T-gate and verified by simulation results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.3
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• pp.439-446
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• 1998

This paper presents design of SD adder and PD adder on Multi-Valued Logic. For implementing of Multi-valued logic circuits we use Current-mode CMOS circuits and also use Voltage-mode CMOS circuits partially. The proposed arithmetic circuits was estimated by SPICE simulation. At the SD(Signed-Digit) number presentation applying Multi-Valued logic the carry propagation is always limited to one position to the left this number presentation allows fast parallel operation. The addition method that add M operands using PD( positive digit number) is effective not only for the realization of the high-speed compact arithmetic circuit, but also for the reduction of the interconnection in the VLSI processor. therefor, if we use PD number representation, the high speed processor can be implementation.

• Kyungpook Mathematical Journal
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• v.59 no.4
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• pp.703-723
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• 2019

In this paper, we consider a common solution of three problems in real Hilbert spaces: the Ky Fan inequality problem, the variational inequality problem and the fixed point problem for demicontractive single-valued and quasi-nonexpansive multi-valued mappings. To find the solution we present a new iterative algorithm and prove a strong convergence theorem under mild conditions. Moreover, we provide a numerical example to illustrate the convergence behavior of the proposed iterative method.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.2 no.3
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• pp.215-220
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• 2002

This paper proposes a method to apply the Backpropagation(BP) algorithm of MVL(Multi-Valued Logic) Neural Network to pattern recognition. It extracts the property of an object density about an original pattern necessary for pattern processing and makes the property of the object density mapped to MVL. In addition, because it team the pattern by using multiple valued logic, it can reduce time f3r pattern and space fer memory to a minimum. There is, however, a demerit that existed MVL cannot adapt the change of circumstance. Through changing input into MVL function, not direct input of an existed Multiple pattern, and making it each variable loam by neural network after calculating each variable into liter function. Error has been reduced and convergence speed has become fast.

• Journal of Information Processing Systems
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• v.14 no.3
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• pp.790-800
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• 2018

The simplified neutrosophic set (SNS) is a generalization of fuzzy set that is designed for some practical situations in which each element has truth membership function, indeterminacy membership function and falsity membership function. In this paper, we propose a new method to construct similarity measures of single valued neutrosophic sets (SVNSs) and interval valued neutrosophic sets (IVNSs), respectively. Then we prove that the proposed formulas satisfy the axiomatic definition of the similarity measure. At last, we apply them to pattern recognition under the single valued neutrosophic environment and multi-criteria decision-making problems under the interval valued neutrosophic environment. The results show that our methods are effective and reasonable.

• Bulletin of the Korean Mathematical Society
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• v.48 no.3
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• pp.575-584
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• 2011

In Shahzad and Zegeye [Nonlinear Anal. 71 (2009), no. 3-4, 838-844], the authors introduced several Ishikawa iterative schemes for xed points of multi-valued mappings in Banach spaces, and proved some strong convergence theorems by using their iterations. In their proofs of the main results, it seems reasonable and simpler to prove for the iteration {$x_n$} to be a Cauchy sequence. In this paper, we modify and improve the proofs of the main results given by Shahzad and Zegeye. Two concrete examples also are given.

• Journal of the Korean Institute of Intelligent Systems
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• v.6 no.4
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• pp.10-16
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• 1996

In this paper, we construct the state table of the automata according to input, state, and change of state and transform that state table into symbolic multi-valued logic formula. Also, we propose an adaptive automata which adapts dynamically change of state aqording to the input string of automata by using the properties of derivative about the symbolic multi-valued logic function. And we analyze the properties of the adaptive automata.