• Title/Summary/Keyword: modular exponentiation

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Cellular Automata and It's Applications

  • Lee, Jun-Seok;Cho, Hyun-Ho;Rhee, Kyung-Hyune
    • Journal of Korea Multimedia Society
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    • v.6 no.4
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    • pp.610-619
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    • 2003
  • This paper presents a concept of cellular automata and a modular exponentiation algorithm and implementation of a basic EIGamal encryption by using cellular automata. Nowadays most of modular exponentiation algorithms are implemented by a linear feedback shift register(LFSR), but its structure has disadvantage which is difficult to implement an operation scheme when the basis is changed frequently The proposed algorithm based on a cellular automata in this paper can overcome this shortcomings, and can be effectively applied to the modular exponentiation algorithm by using the characteristic of the parallelism and flexibility of cellular automata. We also propose a new fast multiplier algorithm using the normal basis representation. A new multiplier algorithm based on normal basis is quite fast than the conventional algorithms using standard basis. This application is also applicable to construct operational structures such as multiplication, exponentiation and inversion algorithm for EIGamal cryptosystem.

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Efficient Architectures for Modular Exponentiation Using Montgomery Multiplier (Montgomery 곱셈기를 이용한 효율적인 모듈라 멱승기 구조)

  • 하재철;문상재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.11 no.5
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    • pp.63-74
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    • 2001
  • Modular exponentiation is an essential operation required for implementations of most public key cryptosystems. This paper presents two architectures for modular exponentiation using the Montgomery modular multiplication algorithm combined with two binary exponentiation methods, L-R(Left to Left) algorithms. The proposed architectures make use of MUXes for efficient pre-computation and post-computation in Montgomery\`s algorithm. For an n-bit modulus, if mulitplication with m carry processing clocks can be done (n+m) clocks, the L-R type design requires (1.5n+5)(n+m) clocks on average for an exponentiation. The R-L type design takes (n+4)(n+m) clocks in the worst case.

Design of Modular Exponentiation Processor for RSA Cryptography (RSA 암호시스템을 위한 모듈러 지수 연산 프로세서 설계)

  • 허영준;박혜경;이건직;이원호;유기영
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.10 no.4
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    • pp.3-11
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    • 2000
  • In this paper, we design modular multiplication systolic array and exponentiation processor having n bits message black. This processor uses Montgomery algorithm and LR binary square and multiply algorithm. This processor consists of 3 divisions, which are control unit that controls computation sequence, 5 shift registers that save input and output values, and modular exponentiation unit. To verify the designed exponetion processor, we model and simulate it using VHDL and MAX+PLUS II. Consider a message block length of n=512, the time needed for encrypting or decrypting such a block is 59.5ms. This modular exponentiation unit is used to RSA cryptosystem.

Design and Analysis of a Linear Systolic Array for Modular Exponentation in GF(2m) (GF(2m) 상에서 모듈러 지수 연산을 위한 선형 시스톨릭 어레이 설계 및 분석)

  • Lee, Won-Ho;Lee, Geon-Jik;Yu, Gi-Yeong
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.7
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    • pp.743-751
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    • 1999
  • 공개키 암호 시스템에서 모듈러 지수 연산은 주된 연산으로, 이 연산은 내부적으로 모듈러 곱셈을 반복적으로 수행함으로써 계산된다. 본 논문에서는 GF(2m)상에서 수행할 수 있는 Montgomery 알고리즘을 분석하여 right-to-left 방식의 모듈러 지수 연산에서 공통으로 계산 가능한 부분을 이용하여 모듈러 제곱과 모듈러 곱셈을 동시에 수행하는 선형 시스톨릭 어레이를 설계한다. 본 논문에서 설계한 시스톨릭 어레이는 기존의 곱셈기보다 모듈러 지수 연산시 약 0.67배 처리속도 향상을 가진다. 그리고, VLSI 칩과 같은 하드웨어로 구현함으로써 IC 카드에 이용될 수 있다.Abstract One of the main operations for the public key cryptographic system is the modular exponentiation, it is computed by performing the repetitive modular multiplications. In this paper, we analyze Montgomery's algorithm and design a linear systolic array to perform modular multiplication and modular squaring simultaneously. It is done by using common-multiplicand modular multiplication in the right-to-left modular exponentiation over GF(2m). The systolic array presented in this paper improves about 0.67 times than existing multipliers for performing the modular exponentiation. It could be designed on VLSI hardware and used in IC cards.

Design of Linear Systolic Arrays of Modular Multiplier for the Fast Modular Exponentiation (고속 모듈러 지수연산을 위한 모듈러 곱셈기의 선형 시스톨릭 어레이 설계)

  • Lee, Geon-Jik;Heo, Yeong-Jun;Yu, Gi-Yeong
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.9
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    • pp.1055-1063
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    • 1999
  • 공개키 암호화 시스템에서 주된 연산은 512비트 이상의 큰 수에 의한 모듈러 지수 연산으로 표현되며, 이 연산은 내부적으로 모듈러 곱셈을 반복적으로 수행함으로써 계산된다. 본 논문에서는 Montgomery 알고리즘을 분석하여 right-to-left 방식의 모듈러 지수 연산에서 공통으로 계산 가능한 부분을 이용하여 모듈러 제곱과 모듈러 곱셈을 동시에 수행하는 선형 시스톨릭 어레이를 설계한다. 설계된 시스톨릭 어레이는 VLSI 칩과 같은 하드웨어로 구현함으로써 IC 카드나 smart 카드에 이용될 수 있다.Abstract The main operation of the public-key cryptographic system is represented the modular exponentiation containing 512 or more bits and computed by performing the repetitive modular multiplications. In this paper, we analyze Montgomery algorithm and design the linear systolic array for performing modular multiplication and modular squaring simultaneously using the computable part in common in right-to-left modular exponentiation. The systolic array presented in this paper could be designed on VLSI hardware and used in IC and smart card.

An Addition-Chain Heuristics and Two Modular Multiplication Algorithms for Fast Modular Exponentiation (모듈라 멱승 연산의 빠른 수행을 위한 덧셈사슬 휴리스틱과 모듈라 곱셈 알고리즘들)

  • 홍성민;오상엽;윤현수
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.7 no.2
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    • pp.73-92
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    • 1997
  • A modular exponentiation( E$M^{$=varepsilon$}$mod N) is one of the most important operations in Public-key cryptography. However, it takes much time because the modular exponentiation deals with very large operands as 512-bit integers. Modular exponentiation is composed of repetition of modular multiplications, and the number of repetition is the same as the length of the addition-chain of the exponent(E). Therefore, we can reduce the execution time of modular exponentiation by finding shorter addition-chain(i.e. reducing the number of repetitions) or by reducing the execution time of each modular multiplication. In this paper, we propose an addition-chain heuristics and two fast modular multiplication algorithms. Of two modular multiplication algorithms, one is for modular multiplication between different integers, and the other is for modular squaring. The proposed addition-chain heuristics finds the shortest addition-chain among exisiting algorithms. Two proposed modular multiplication algorithms require single-precision multiplications fewer than 1/2 times of those required for previous algorithms. Implementing on PC, proposed algorithms reduce execution times by 30-50% compared with the Montgomery algorithm, which is the best among previous algorithms.

Modular Exponentiation by m-Numeral System (m-진법 모듈러 지수연산)

  • Lee, Sang-Un
    • The KIPS Transactions:PartC
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    • v.18C no.1
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    • pp.1-6
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    • 2011
  • The performance and practicality of cryptosystem for encryption, decryption, and primality test is primarily determined by the implementation efficiency of the modular exponentiation of $a^b$(mod n). To compute $a^b$(mod n), the standard binary squaring still seems to be the best choice. But, the d-ary, (d=2,3,4,5,6) method is more efficient in large b bits. This paper suggests m-numeral system modular exponentiation. This method can be apply to$b{\equiv}0$(mod m), $2{\leq}m{\leq}16$. And, also suggests the another method that is exit the algorithm in the case of the result is 1 or a.

The alternative Method to Finish Modular Exponentiation and Point Multiplication Processes

  • Somsuk, Kritsanapong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.7
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    • pp.2610-2630
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    • 2021
  • The aim of this paper is to propose the alternative algorithm to finish the process in public key cryptography. In general, the proposed method can be selected to finish both of modular exponentiation and point multiplication. Although this method is not the best method in all cases, it may be the most efficient method when the condition responds well to this approach. Assuming that the binary system of the exponent or the multiplier is considered and it is divided into groups, the binary system is in excellent condition when the number of groups is small. Each group is generated from a number of 0 that is adjacent to each other. The main idea behind the proposed method is to convert the exponent or the multiplier as the subtraction between two integers. For these integers, it is impossible that the bit which is equal to 1 will be assigned in the same position. The experiment is split into two sections. The first section is an experiment to examine the modular exponentiation. The results demonstrate that the cost of completing the modular multiplication is decreased if the number of groups is very small. In tables 7 - 9, four modular multiplications are required when there is one group, although number of bits which are equal to 0 in each table is different. The second component is the experiment to examine the point multiplication process in Elliptic Curves Cryptography. The findings demonstrate that if the number of groups is small, the costs to compute point additions are low. In tables 10 - 12, assigning one group is appeared, number of point addition is one when the multiplier of a point is an even number. However, three-point additions are required when the multiplier is an odd number. As a result, the proposed method is an alternative way that should be used when the number of groups is minimal in order to save the costs.

Design of an LFSR Multiplier with Low Area Complexity (효율적인 공간 복잡도의 LFSR 곱셈기 설계)

  • 정재형;이성운;김현성
    • Journal of Korea Society of Industrial Information Systems
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    • v.8 no.3
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    • pp.85-90
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    • 2003
  • This paper proposes a modular multiplier based on LFSR (Linear Feedback Shift Register) architecture with efficient area complexity over GF(2/sup m/). At first, we examine the modular exponentiation algorithm and propose it's architecture, which is basic module for public-key cryptosystems. Furthermore, this paper proposes on efficient modular multiplier as a basic architecture for the modular exponentiation. The multiplier uses AOP (All One Polynomial) as an irreducible polynomial, which has the properties of all coefficients with '1 ' and has a more efficient hardware complexity compared to existing architectures.

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Efficient Exponentiation in Extensions of Finite Fields without Fast Frobenius Mappings

  • Nogami, Yasuyuki;Kato, Hidehiro;Nekado, Kenta;Morikawa, Yoshitaka
    • ETRI Journal
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    • v.30 no.6
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    • pp.818-825
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    • 2008
  • This paper proposes an exponentiation method with Frobenius mappings. The main target is an exponentiation in an extension field. This idea can be applied for scalar multiplication of a rational point of an elliptic curve defined over an extension field. The proposed method is closely related to so-called interleaving exponentiation. Unlike interleaving exponentiation methods, it can carry out several exponentiations of the same base at once. This happens in some pairing-based applications. The efficiency of using Frobenius mappings for exponentiation in an extension field was well demonstrated by Avanzi and Mihailescu. Their exponentiation method efficiently decreases the number of multiplications by inversely using many Frobenius mappings. Compared to their method, although the number of multiplications needed for the proposed method increases about 20%, the number of Frobenius mappings becomes small. The proposed method is efficient for cases in which Frobenius mapping cannot be carried out quickly.

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