• 한국도로학회논문집
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• 제3권4호
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• pp.93-103
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• 2001

본 연구에서는 콘크리트 덧씌우기를 위한 SB 라텍스개질 콘크리트의 현장적용성 평가를 위해 현장에서 모빌믹서를 이용하여 배합실험 하여 작업성, 강도발현특성 및 투수특성을 등을 고찰하였다. 이를 위해 주요 실험변수는 라텍스 혼입률(0, 5, 10, 15, 20%), W/C (31, 33, 35 37%), S/a(55, 56, 57, 58%) 를 선정하였으며, 초기슬럼프, 슬럼프 손실, 공기량, 압축강도 및 휨인장강도 발현특성, 염화이온 촉진 실험 등을 수행하였다. 실험결과, 모빌믹서차량을 이용해서 SB라텍스개질 콘크리트를 현장에서 배합하였을 때 충분한 작업성 및 양질의 콘크리트를 생산 할 수 있었으며 목표 압축강도와 휨강도를 얻을 수 있었다. 모빌믹서 차량을 이용한 배합은 실내실험에서 제시된 최적배합의 동일한 작업조건을 얻기 위한 물-시멘트비가 다소 낮아지는 것으로 나타났다. 초기 배출 슬럼프 $19{\pm}3cm$을 얻기 위한 실내실험 배합은 물-시멘트비 37%였으나, 모빌믹서차량을 이용한 경우는 33%의 물-시멘트비를 나타내었다. 또한, 현장 적용에 있어서도 모빌믹서를 이용한 정확한 계량 및 라텍스의 혼입으로 양질의 콘크리트 생산 및 성능개선을 기대할 수 있음을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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• pp.61-64
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• 2000

This paper describes a RF Down-Conversion Mixer for mobile communication systems. This circuit achieves low voltage operation and low power consumption by reducing stacked devices of conventional gilbert cell mixer. In order to reduce stacked devices, we use source-follower structure. The proposed RF Down-Conversion mixer operates up to 1.85GHz at 1.5V power supply with 0.25um CMOS technology and consumes 2.2mA.

• Journal of electromagnetic engineering and science
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• 제7권4호
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• pp.154-160
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• 2007

A reconfigurable multi-band mixer for the SDR system is proposed. The proposed reconfigurable mixer is operated between $850\;MHz{\sim}2\;GHz$, which includes all commercial mobile communication service. Because the varactor diodes are used to select a specific frequency and to adjust the impedance characteristic of the selected frequency band, the proposed reconfigurable mixer can be achieved to similar performance across all of the tuning range. In addition, the designed reconfigurable mixer is applicable for the SDR system since it has a single signal path for the multi-band signals and wide band tuning range.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.16-20
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• 2002

This paper describes the resistive FET mixer with low IF for the 4-Ch DBF(Digital Beam Forming) receiver with LNA(Low Noise Amplifier). This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 2.09 ㎓, 2.08 ㎓ and 10㎒, respectively. The RF input power, LO input power and Vgs are used -10㏈m, 6㏈m and -0.4 V, respectively. In the 4-Ch resistive FET mixer with LNA, the measured IF and harmonic components of 10㎒, 20㎒, 2.09㎓ and 4.17㎓ are about -12.5 ㏈m, -57㏈m, -40㏈m and -54㏈m, respectively. The IF output power observed at each channel of 10㎒ is about -12.5㏈m and it is higher 27.5 ㏈m than the maximum harmonic component of 2.09㎓. Each IF output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

• Journal of electromagnetic engineering and science
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• 제2권2호
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• pp.117-123
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• 2002

This paper describes the design for the resistive FET mixer with low If for the 4-Ch DBF(Digital Beam Forming) receiver This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(If) considered in this research are 2.09 GHz, 2.08 CHz and 10 MHz, respectively. This mixer is composed of band pass filter, a low pass filter and a DC bias circuit. Super low noise HJ FET of NE3210S01 is considered in design. The RE input power, LO input power and Vcs are used -10 dBm, 6 dBm and -0.4 V, respectively. In the 4-Ch resistive FET mixer, the measured If and harmonic components of 10 MHe, 20 MHz and 2.087 CHz are about -19.2 dBm, -66 dBm and -48 dBm, respectively The If output power observed at each channel of 10 MHz is about -19.2 dBm and it is higher 28.8 dBm than the maximum harmonic component of 2.087 CHz. Each If output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

• 한국콘크리트학회:학술대회논문집
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• 한국콘크리트학회 2001년도 가을 학술발표회 논문집
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• pp.1215-1218
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• 2001

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.894-897
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• 2003

Recently, the rapid growth of mobile radio system has led to an increasing demand of low-cost high performance communication IC's. In this paper, we have designed RF front end for wireless LAN receiver employ zero-IF architecture. A low-noise amplifier (LNA) and double-balanced mixer is included in a front end. The zero-IF architecture is easy to integrate and good for low power consumption, so that is coincided to requirement of wireless LAN. But the zero-IF architecture has a serious problem of large offset. Image-reject mixer is a good structure to solve offset problem. Using offset compensation circuit is good structure, too. The front end is implemented in 0.25 ${\mu}m$ CMOS technology. The front end has a noise figure of 5.6 dB, a power consumption of 16 mW and total gain of 22 dB.

• Design & Manufacturing
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• 제7권1호
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• pp.55-59
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• 2013

A Light Emitting Diode(LED) is a semiconductor device which converts electricity into light. LEDs are widely used in a field of illumination, LCD(Liquid Crystal Display) backlight, mobile signals because they have several merits, such as low power consumption, long lifetime, high brightness, fast response, environment friendly. In general, LEDs production does die bonding and wire bonding on board, and do silicon and phosphor dispensing to protect LED chip and improve brightness. Then lens molding process is performed using mixed liquid silicon rubber(LSR) by resin and hardener. A mixture of resin and hardener affect the optical characteristics of the LED lens. In this paper, computational design of static mixer was performed for mixing of liquid silicon. To evaluate characteristic of mixing efficiency, finite element model of static mixer was generated, and fluidic analysis was performed according to length of mixing element. Finally, optimal condition of length of mixing element was applied to static mixer from result of fluidic analysis.

• 전기전자학회논문지
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• 제7권2호
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• pp.236-244
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• 2003

본 논문에서는 기존에 값비싼 BiCMOS 공정으로 주로 구현되던 이동통신 단말기용 RF단 및 IF단 회로들을 CMOS 회로로 설계하고, 최종적으로 PCS 대역 송신용 CMOS RF/IF 단일 칩을 설계하였다. 설계된 회로는 IF PLL 주파수합성기, IF Mixer, VGA등을 포함하는 IF 단과, SSB RF Mixer 블록과 구동 증폭기를 포함하는 RF 단으로 구성되며, 디지털 베이스밴드와 전력증폭기 사이에 필요한 모든 신호처리를 수행한다. 설계된 IF PLL 주파수합성기는 100kHz의 옵셋 주파수에서 -114dBc/Hz의 위상잡음 특성을 보이며, lock time은 $300{\mu}s$보다 작고, 3V 전원에서 약 5.3mA의 전류를 소모한다. IF Mixer 블록은 3.6dB의 변환이득과 -11.3dBm의 OIP3 특성을 보이며, 3V 전원에서 약 5.3mA의 전류를 소모한다. VGA는 모든 이득 설정시 3dB 주파수가 250MHz 보다 크며, 약 10mA의 전류를 소모한다. 설계된 RF단 회로는 14.93dB의 이득, 6.97dBm의 OIP3, 35dBc의 image 억압, 31dBc의 carrier 억압 등의 특성을 보이며, 약 63.4mA의 전류를 소모한다. 설계된 회로는 현재 $0.35{\mu}m$ CMOS 공정으로 IC 제작 중에 있다. 전체 칩의 면적은 $1.6㎜{\times}3.5㎜$이고 전류소모는 84mA이다.

• 한국컴퓨터산업학회논문지
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• 제2권11호
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• pp.1477-1482
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• 2001

본 논문에서는 개인휴대통신(PCS)의 최소 규격인 J-STD-018을 기준으로, 높은 이득과 낮은 제 3고조파 차단점을 갖는 수동 더블 밸런스 혼합기와 중간 주파 증폭기로 구성된 수신 시스템을 구성하여 수신 파라미터를 시뮬레이션 결과, 수신감도 규격의 파라미터인 잡음지수는 $E_b/N_t=6$일 때 6.746dB이고 상호변조 스퓨리어스 응답 감쇄 규격의 파라미터인 3차 고조파 차단점은 -11.358dBm이었다.