• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.583-585
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• 2012

In this paper, we introduce a design method for a broadband planar quasi-Yagi antenna (QYA) for terrestrial digital television (DTV) receiving. The coplanar strip line feeding the driver dipole is connected to a microstrip line and is terminated by short circuit. By appending a wide strip-type director at a location close to the driver dipole, a broadband impedance matching and a gain characteristics in a high frequency region are obtained. The gain characteristics in a low frequency region are improved by adding a reflector formed by a truncated ground plane. To reduce the antenna size, the strip-type dipole and reflector are modified to half bowtie (V)-shaped elements. The effects of various parameters on the antenna characteristics are examined. An antenna, as an design example for the proposed antenna, is designed for the operation in the frequency band of 470-806 MHz for terrestrial DTV. The optimized antenna is fabricated on an FR4 substrate and tested experimentally to verify the results of this study.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.1-9
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• 2014

In this paper, a reconfigurable polarization patch antenna that uses a Y-shaped feed is proposed. The proposed antenna consists of a square patch, a Y-shaped feeding structure, a PIN diode, and a bias circuit for diode operation. The structural symmetry/asymmetry of the feeding structure is determined by the on/off operation of the PIN diode that inserted into the side of one of the lines of the Y-shaped feeding structure. For the proposed reconfigurable antenna, the two microstrip lines of the feeding structure have the same length when the PIN diode operates in the on state, and the antenna exhibits linear polarization(LP). On the other hand, when the PIN diode operates in the off state, the length of one side line of the feeding structure is relatively shorter than that of the other line. Therefore, the antenna exhibits circular polarization(CP). From the measurement results, it is found that the proposed antenna exhibits good impedance matching and axial ratio. In addition, polarization switching can be easily achieved in the same operating band.

• Applied Microscopy
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• v.34 no.1
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• pp.51-59
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• 2004

The high acceleration voltage system used in scanning electron microscope were designed and manufactured to test its stability. The Cockcroft-Walton circuits are used both in the cathode voltage up to -30 kV and in the Wehnelt cylinder of -2 kV. The operating voltage of 6 V was applied to the heating of the filament. The wave forms which are formed in the second leg of the high voltage transformer were observed in the oscilloscope with 2 V of DC input. When the high voltages were in the range between 5 kV and 12 kV, the highest value of the stabilities of the generated voltages was obtained as 0.002%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.1
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• pp.102-109
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• 2000

In this paper, a Low Noise Amplifier for B-WLL was designed using the MMIC technology with GaAs PHEMTs fabricated at our lab. The PHEMT for LNA has a $0.35\mu\textrm{m}$ gate and a total gate width of $120\mu\textrm{m}$. The designed MMIC LNA consists of three stages. The first stage of the LNA has a series inductive feedback for obtaining minimum noise and high stability as well. And the designed MMIC LNA has not an interstage matching circuit between the second and the third stage for minimization of the chip size. From simulation results, noise figure and S21 gain of the designed MMIC LNA are 0.85~1.25 dB and 22.08~23.65 dB in the frequency range of 25.5~27.5 GHz respectively. And the chip size is $3.7\times1.6 mm^2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.4
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• pp.506-514
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• 1998

The design and fabrication of X-band(11.7~12 GHz) 2-stage monolithic microwave integrated circuit(MMIC) low noise amplifier (LNA) for active antenna are presented using $0.15{\mu}m\times140{\mu}m$ AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (P-HEMT). In each stage of the LNA, a series feedback by using a source inductor is used for both input matching and good stability. The measurement results are achieved as an input return loss under -17 dB, an output return loss under -15dB, a noise figure of 1.3dB, and a gain of 17 dB at X-band. This results almost concur with a design results except noise figure(NF). The chip size of the MMIC LNA is $1.43\times1.27$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.115-122
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• 2016

In this paper, wideband Ku-band downconverter was designed to receiver digital satellite broadcasting. The low-nose downconverter was designed to form four local oscillator frequencies(9.75, 10, 10.75 and 11.3 GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75 GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select intermediate frequency bands by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64 dB, and the noise figure of low-noise amplifier was 0.7 dB, the P1dB of output signal 15 dBm, and the phase noise -85 dBc@10kHz at the band 1 carrier frequency of 9.75 GHz. The low noise block downconverter(LNB) for wideband digital satellite broadcasting designed in this paper can be used for global satellite broadcasting LNB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1239-1247
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• 2012

In this paper, design and fabrication of solid state power amplifier(SSPA) using GaN HEMT chip for X-band frequency are presented. The SSPA consists of the power supply for stable power and the control unit for communication and controlling the internal module, the RF Part to amplify RF signal, In particular the adopted active device for the RF Parts is GaN HEMT Bare chip of TriQuint company, the RF parts consists of pre-stage, drive-stage, main power-stage and each amplifier is designed with input and out matching circuit. The developed power amplifier demonstrated more than 300 W peak output power in condition of 26 % duty, max. pulse width 100us for the X-band frequency( 500 MHz bandwidth) and can apply to marine radar systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.415-422
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• 2004

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz down-conversion mixer for DSRC communication system was designed and fabricated using 0.8 ${\mu}{\textrm}{m}$ SiGe HBT process technology and RF/LO matching circuits, RF/LO input balun circuits, and If output balun circuit were all integrated on chip. The chip size of fabricated mixer was 1.9 mm${\times}$1.3 mm and the measured performance was 7.5 ㏈ conversion gain, －2.5 ㏈m input IP3, 46 ㏈ LO to RF isolation, 56 ㏈ LO to IF isolation, current consumption of 21 mA for 3.0 V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.350-357
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• 2005

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz up-conversion mixer for DSRC communication system was designed and fabricated using 0.8 m SiGe HBT process technology and IF/LO/RF matching circuits, IF/LO input balun circuits, and RP output balun circuit were all integrated on chip. The chip size of fabricated mixer was $2.7mm\times1.6mm$ and the measured performance was 3.5 dB conversion gain, -12.5 dBm output IP3, 42 dB LO to If isolation, 38 dB LO to RF isolation, current consumption of 29 mA for 3.0 V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.100-108
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• 2014

Low noise amplifier (LNA) is an integral component of RF receiver and frequently required to operate at wide frequency bands for various wireless system applications. For wideband operation, important performance metrics such as voltage gain, return loss, noise figure and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high impedance-matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that input impedance can be described in the form of second-order frequency response, where poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor located between the gate and the drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this wideband LNA is $0.202mm^2$, including pads. Measurement results illustrate that the input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 6-8 dB over 1.5 - 13 GHz. In addition, good linearity (IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.