• Journal of the Korean Ceramic Society
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• v.33 no.3
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• pp.313-320
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• 1996

We have fabricated an in-plane aligned a-axis oriented YBa2Cu3O7-x (a-YBCO) thin film on a LaSrGaO4(100) substrate with a PrBa2Cu3O7-x(PBCO) template layer by two step plused laser deposition using 308 nm XeCl excimer laser. A YBCO layer and PBCO layer grown at low temperatures were used as template layers. We have investigated the effect of the deposition temperature of template layers on the superconducting and struc-tural properties of in-plane aligned a-YBCO thin films. An optimal deposition temperature of the PBCO template layers was 630. In-plane aligned a-YBCO thin films showed an anisotropy ratio in resistivity of 11.5 and a zero resistance temperature of 88 K.

• Journal of the Korean institute of surface engineering
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• v.32 no.6
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• pp.703-708
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• 1999

Silicides have been used extensively in ULSI logic device fabrication as contact materials for the active areas as well as the poly- Si gates. NiSi is a promising candidate for submicron device application due to less volume expansion, low formation temperature, little silicon consumption, and large stable processing temperature window. In this report, the microstructure of nickel silicides fabricated with a thermal evaporator has been investigated. We observed systematic transformation of Ni silicides of $Ni_2$Si, NiSi, $NiSi_2$, as annealing temperature increases. All the silicides have been identified by a X-ray diffractometer (XRD). The cross-sectional microstructure of silicides was examined by a transmission electron microscope (TEM) equipped with a energy dispersive spectrometer(EDS). The surface roughness of silicides was measured by scanning probe microscope(SPM). Although we observed thin oxide layer existed at the $Ni/NiSi_{x}$ interface, we fabricated successfully $550\AA$-thick planar Ni-monosilicide at the temperature range of$ 400~700^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.97-100
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• 2001

This paper presents the characteristics of Ta-N thin-film strain gauges as high-temperature strain gauges, which were deposited on Si substrate by DC reactive magnetron sputtering in an argon-nitrogen atmosphere(Ar-(4∼16 %)N$_2$). These films were annealed for 1 hour in 2x10$\^$-6/ Torr vaccum furnace range 500∼1000$^{\circ}C$. The optimized conditions of Ta-N thin-film strain gauges were annealing condition(900$^{\circ}C$, 1 hr.) in 8% N$_2$ gas flow ratio deposition atmosphere. Under optimum conditions, the Ta-N thin-films for strain gauges is obtained a high resistivity, $\rho$=768.93 ${\mu}$Ω cm, a low temperature coefficient of resistance, TCR=-84 ppm/$^{\circ}C$ and a high temporal stability with a good longitudinal gauge factor, GF=4.12.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.278-278
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• 2007

Ag conductive thick film has been used in bus and address electrodes of PDP (Plasma display panel). In PDP fabrication, the firing temperature of electrode is normally $550{\sim}580^{\circ}C$. For the application of PDP industry, we investigated an Ag conductive thick film with firing temperature. Low melting glass frit was used in the conductive thick film. The thermal properties of Ag and frit were determined by a hot stage microscopy. Based on the our results, we suggest that the Ag conductive thick film should be considered of the firing temperature which is correlated to the shrinkage, conductivity, and shape of thick film.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.595-596
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• 2006

The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and low-temperature processes. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing which is high-resolution lithography technology using polydimethylsiloxane(PDMS) stamp. The OTFT array with dielectric layer and organic active semiconductor layers formed at room temperature or at a temperature tower than $40^{\circ}C$. The microcontact printing process using SAM(self-assembled monolayer) and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even nano size, and reduced the procedure by 10 steps compared with photolithography. Since the process was done in low temperature, there was no pattern transformation and bending problem appeared. It was possible to increase close packing of molecules by SAM, to improve electric field mobility, to decrease contact resistance, and to reduce threshold voltage by using a big dielecric.

• Journal of Sensor Science and Technology
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• v.9 no.1
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• pp.76-82
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• 2000

PTC thermistors with multilayer structure were fabricated by internal electrode bonding technique in order to realize low resistance. MLPTC (Multilayer Positive Temperature Coefficient) possess various features, such as small size, low resistivity and large current. We describe the effect of additives on the PTC characteristics, voltage - current characteristics, temperature dependence of resistance and complex impedance spectra as a function of frequency range 100 Hz to 13MHz to determine grain boundary resistance. It was found that MLPTC thermistor has both highly nonlinear effects of temperature dependent resistance and voltage dependent current behaviors, which act as passive element with self-repair mechanisms. Decrease of room temperature resistance with increasing the number of layers was demonstrated to be a grain boundary effect. Switching characteristics of current were caused by heat capacity of PTC thermistor with multilayer structure. Switching times are lengthened by increasing the number of layers.

• Progress in Superconductivity and Cryogenics
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• v.14 no.1
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• pp.44-47
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• 2012

The substantial improvement of the signal-to-noise ratio (SNR) can be achieved with small-size samples or low-field MRI system by high-temperature superconducting(HTS) RF coil. The typical HTS RF coil made of HTS thin film is expensive and is limited the coil geometry to planar surface coil. In this study, commercial Bi-2223 HTS tapes was used as RF coil for a 0.35T permanent MRI system. It has advantages of both much lower cost and easier fabrication over HTS thin film coil. SNR gain of the image obtained from the HTS RF coil over a conventional Cu RF coil at room temperature was about 2.4-fold and 1.9-fold using the spin echo pulse sequence and gradient echo pulse sequence respectively.

• Journal of Powder Materials
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• v.28 no.1
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• pp.44-50
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• 2021

Zinc selenide (ZnSe) nanoparticles were synthesized in aqueous solution using glutathione (GSH) as a ligand. The influence of the ligand content, reaction temperature, and hydroxyl ion concentration (pH) on the fabrication of the ZnSe particles was investigated. The optical properties of the synthesized ZnSe particles were characterized using various analytical techniques. The nanoparticles absorbed UV-vis light in the range of 350-400 nm, which is shorter than the absorption wavelength of bulk ZnSe particles (460 nm). The lowest ligand concentration for achieving good light absorption and emission properties was 0.6 mmol. The reaction temperature had an impact on the emission properties; photoluminescence spectroscopic analysis showed that the photo-discharge characteristics were greatly enhanced at high temperatures. These discharge characteristics were also affected by the hydroxyl ion concentration in solution; at pH 13, sound emission characteristics were observed, even at a low temperature of 25℃. The manufactured nanoparticles showed excellent light absorption and emission properties, suggesting the possibility of fabricating ZnSe QDs in aqueous solutions at low temperatures.

• Journal of the Korean Solar Energy Society
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• v.37 no.2
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• pp.77-85
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• 2017

Thin crystalline silicon (C-Si) solar cell is expected to be a low price energy source by decreasing the consumption of Si. However, thin c-Si solar cell entails the bowing and crack issues in high temperature manufacturing process. Thus, the conventional tabbing process, based on high temperature soldering (> $250^{\circ}C$), has difficulties for applying to thin c-Si solar cell modules. In this paper, a conductive paste (CP) based interconnection process has been proposed to fabricate thin c-Si solar cell modules with high production yield, instead of existing soldering materials. To optimize the process condition for CP based interconnection, we compared the performance and stability of modules fabricated under various lamination temperature (120, 150, and $175^{\circ}C$). The power from CP based module is similar to that with conventional tabbing process, as modules are fabricated. However, the output of CP based module laminated at $120^{\circ}C$ decreases significantly (14.1% for Damp heat and 6.1% for thermal cycle) in harsh condition, while the output drops only in 3% in the samples process at $150^{\circ}C$, $175^{\circ}C$. The peel test indicates that the unstable performance of sample laminated at $120^{\circ}C$ is attributed to weak adhesion strength (1.7 N) between cell and ribbon compared to other cases (2.7 N). As a result, optimized lamination temperature for CP based module process is $150^{\circ}C$, considering stability and energy consumption during the fabrication.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.9-17
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• 2017

In these days, MEMS (micro-electro-mechanical system) devices become the crucial sensor components in mobile devices, automobiles and several electronic consumer products. For MEMS devices, the packaging determines the performance, reliability, long-term stability and the total cost of the MEMS devices. Therefore, the packaging technology becomes a key issue for successful commercialization of MEMS devices. As the IoT and wearable devices are emerged as a future technology, the importance of the MEMS sensor keeps increasing. However, MEMS devices should meet several requirements such as ultra-miniaturization, low-power, low-cost as well as high performances and reliability. To meet those requirements, several innovative technologies are under development such as integration of MEMS and IC chip, TSV(through-silicon-via) technology and CMOS compatible MEMS fabrication. It is clear that MEMS packaging will be key technology in future MEMS. In this paper, we reviewed the recent development trends of the MEMS packaging. In particular, we discussed and reviewed the recent technology trends of the MEMS bonding technology, such as low temperature bonding, eutectic bonding and thermo-compression bonding.