• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.6
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• pp.471-477
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• 2012

In this paper, in order to use module integrated converter using cascaded buck-boost converter for a low battery charger in stand-alone system, a charging algorithm which considers photovoltaic and battery status and PWM controllers which are changed according to charging modes are proposed. The proposed algorithm consists of constant current mode, constant voltage mode and maximum power point tracking mode which enables the battery to charge with maximum power rate. This paper also presents design of cascaded buck-boost converter that is the photovoltaic charger system. A 150W prototype system is built according to verify proposed the charger system and the algorithm.

• Journal of the Korean Institute of Intelligent Systems
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• v.19 no.1
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• pp.145-151
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• 2009

Orthogonal Frequency Division Multiplexing (OFDM) has been focused on as 4th generation communication method for realization of Ubiquitous Network in land mobile communications services, and has been a standard technology of Wireless Local Area Network (WLAN) for a High Date Rate communication. And in maritime data communication using high frequency (HF) band, 32-point FFT OFDM system is recommended by International Telecommunication Union (ITU). Maritime communication should be kept on connecting when maritime accident or the maritime disaster happen. Therefore, main device FFT should be operated with low power consumption. In this paper we propose a low power 32-point FFT algorithm using radix-2 and radix-4 for low power operation. The proposed algorithm was designed using VHSIC hardware description language (VHDL), and it was confirmed that the output value of Spartan-3 field-programmable gate array (FPGA) board corresponded to the output value calculated using Matlab. The proposed 32-point FFT algorithm will be useful as a leading technology in a HF maritime data communication.

• Journal of Internet Computing and Services
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• v.11 no.3
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• pp.33-41
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• 2010

The battery consumption and the wireless communication pattern were analyzed for the low power and the improvement of channel interferences between of Zigbee networks and WPAN(Wireless Personal Area Network). The communication patterns considering end device's battery saving during channel searching period were analyzed for low power consumption topology of Zigbee dynamic ad-hoc characteristics. And, the communication patterns were analyzed due to channel interferences between WLAN and Random Back off of Zigbee, too. As a result, the communication patterns of Zigbee's coordinator and end devices is alleviated for the longer battery life time of Zigbee's end device due to Zigbee's end device setting techniques.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1139-1140
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• 2008

This paper is designated to introduce the method of reducing stand-by Power of SMPS applied PLC(Power Line Communication) and its implementation. PLC modem consists mainly of PLC Module, Coupling Circuit, ZCP(Zero-Cross Point) Circuit and Power Supply Circuit. By controlling power from Power Supply Circuit to PLC Module and ZCP Circuit, the reduction of Stand-by Power is established. When this method is applied to SMPS used for a low-speed PLC, about 50% power reduction is provided, compared to the other case to which it is not applied.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.4
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• pp.370-376
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• 2000

In this paper, a communication system that is not using the communication line but power line is presented. It will be very useful for an information-oriented society with tele-metering and home automation. Conventional system has a difficulty in transmitting information due to decreasing communication voltage and increasing carrier current. Proposed idea is a special type switching amplifier system which has a low inner resistance. It can provide reactive power and does not have low impedance between the transceivers. This new system is proposed to overcome the loss of conductor load in a PLC system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8A
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• pp.661-668
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• 2012

In this paper, we introduce the low power wireless communication method and propose new protocol and algorithm for wireless communication which can be applied Active RFID system. Transceiver module is composed of MCU, RF transceiver and chip antenna. and it used the lithium coin battery for power supply. The experimental result is confirmed minimum power consumption which show average $10{\mu}A$(packet transmit) and $30{\mu}A$(packet receive) per second. It can be used ultra low power wireless communication. this result is possible for using the algorithm which predict the arrival time of packet. and it indicates that are possible to prevent malfunction and enhance responsiveness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.585-593
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• 2017

In this paper, we propose a deblocking filter hardware architecture for low-power HEVC (High-Efficiency Video Coding) in-loop for mobile systems. HEVC performs image compression on a block-by-block basis, resulting in blockage of the image due to quantization error. The deblocking filter is used to remove the blocking phenomenon in the image. Currently, UHD video service is supported in various mobile systems, but power consumption is high. The proposed low-power deblocking filter hardware structure minimizes the power consumption by blocking the clock to the internal module when the filter is not applied. It also has four parallel filter structures for high throughput at low operating frequencies and each filter is implemented in a four-stage pipeline. The proposed deblocking filter hardware structure is designed with Verilog HDL and synthesized using TSMC 65nm CMOS standard cell library, resulting in about 52.13K gates. In addition, real-time processing of 8K@84fps video is possible at 110MHz operating frequency, and operation power is 6.7mW.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1C
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• pp.149-156
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• 2004

In this paper, novel power-aware motion estimation is proposed for low-power multimedia communication. In the video compression, motion estimation dominates the total power consumption, where better performance usually requires more power consumption. Among several motion estimation algorithms with different performance and power, the proposed motion estimation adaptively selects the optimal algorithm during run-time, considering the trade-off between performance and power. The proposed motion estimation can be easily applied to various motion estimation algorithms with negligible computation or hardware overhead. According to simulation results, the proposed motion estimation reduces the power consumption to 1/15.7~1/5.6 without performance degradation, when compared to the conventional algorithms.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.51 no.5
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• pp.197-202
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• 2002

In this paper, the characteristics of the household AC power line network is analyzed for the low bit rate powerline communication (PLC) in the frequency range from 10㎑ to 450㎑ The PLC channel transfer characteristics including its characteristic impedance are derived based on the network topology which is constructed with the household power lines loaded with the various types of electric apparatus. Both the distributed circuit analysis and the lumped circuit model based analysis are applied for the characterization of the PLC channel and the results are compared by the computer simulations. The analysis illustrates very well the adverse effects caused by the loading of electric apparatus and as well those casued by the reflection of wavers in the household AC Power line communication network.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.481-487
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• 2016

A new two-line based inversion driving method is introduced for low power display-driver ICs. By inserting a timing offset between the chopper stabilization and the alternation of LCD polarity, we can reduce power consumption without noticeable degradation in the display quality. By applying the proposed scheme to 12" LCD applications, we achieved 7.5% and 27% power saving in the display-driver IC with white and black patterns, respectively.