• Journal of Power Electronics
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• v.13 no.2
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• pp.296-303
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• 2013

This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2522-2525
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• 1999

Buck converter is considered to be one of the most widely used DC-DC converters due to its simple structure and high reliable performance. However, when it be combined with thin-film inductor, its own low inductance requires higher switching frequency in order to maintain optimum output ripple voltage and thus gives rise to extra switching losses. In view to overcoming such a technical in-convenience, soft switching fashion is suggested such as zero-voltage-switching of which an well known example is a Zero-Voltage-Switching clamp voltage(ZVS-CV) converter for which low inductance is imperatively required for ZVS operation. In order to support our suggestion, a 1W of ZVS-CV buck converter( Vo=3.3V, Iomax=0.3A, fs= 1.2MHz) is built by use of thin-film inductor, and then tested for comparing the measured efficiency between ours and conventional one. As the our results. the efficiency is improved about 2% at full load by the application of our concept.

• Journal of Power Electronics
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• v.17 no.1
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• pp.31-40
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• 2017

A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.3
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• pp.276-282
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• 2014

In a single-phase grid-connected power system consisting of a dc-dc converter and a dc-ac converter, the current drawn from renewable energy sources has a tendency to be pulsated and contains double-fundamental frequency ripple components, which results in several drawback such as a power harvesting loss and a shortening of the energy source's life. This paper presents a new double-fundamental current reduction-scheme with a fast dc-link voltage loop for two-stage dc-dc-ac grid connected systems. In the frequency domain, an adequate control design is performed based on the small-signal transfer function of a two-stage dc-dc-ac converter. To verify the effectiveness of proposed control algorithm, a 1 kW hardware prototype has been built and experimental results are presented.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.4
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• pp.267-272
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• 2010

In this paper, a Gm-C LPF utilizing common-mode feedforward (CMFF) CMOS inverter type operational transconductance amplifier (OTA) has been designed and verified by circuit simulations. The CMFF CMOS inverter OTA was optimized for wide input linearity and low current consumption using a standard 0.18 ${\mu}m$ CMOS process; gm of 100 ${\mu}S$ and current of 100 ${\mu}A$ at supplied voltage of 1.3 V. Using this optimized CMFF CMOS inverter type OTA, an elliptic 5th order Gm-C LPF for GPS specifications was designed. Gain and frequency tuning of the LPF was done by changing the internal supply voltages. The designed Gm-C LPF gave pass-band ripple of 1.6 dB, stop-band attenuation of 60.8 dB, current consumption of 0.60 mA at supply voltage of 1.2 V. The gain and frequency characteristics of designed Gm-C LPF was unchanged even though the input common-mode voltage is varied.

• Transactions on Electrical and Electronic Materials
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• v.14 no.5
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• pp.235-241
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• 2013

A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.2
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• pp.144-155
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• 1992

A design of a highly stable current-controlled power supply combining the phase-controlled rectifier (PCR), passive filter and active filter is investigated. A digital phase-looked voltage control (PLVC) with a capability of compensating the thyristor firing angles under unvalanced power source is proposed` otherwise the PCR output voltage has low-order subharmonics whose suppression requires a bulky passive filter. The digital PLVC has a fast dynamic characteristics as an inner control loop of the PCR. To suppress further the output ripple, an active filter using a transformer is introduced and its design is described through the frequency domain analysis. An optimal integral, proportional and measurable variable feedback (IPM) controller is designed using the time-weighted performance index based on the time domain analysis. The design method based on the time-weighted performance index gives better response characteristics than that based on the conventional performance index. It is also shown via experimental results that the proposed scheme gives better response characteristics than that based on the conventional performance index. It is also shown via experimental results that the proposed scheme gives good dynamic and static performances.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.399-402
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• 2002

In this paper, the novel method is proposed to measure the capacitance of the dc link capacitor Advantage of the method is not to separate capacitor from 3-phase AC/DC/AC converters. In the proposed method, a specific low frequency current is injected to oscillate the voltage of dc capacitor at no load condition. The capacitance of dc capacitor is calculated with the effective values of this ripple voltage and current. The validity of the proposed method is confirmed by PSIM simulation.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.553-555
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• 1996

This paper concerns with a method to improve the current and power waveforms of the variable speed $3{\Phi}$ AC motor system driven by the single-pulse PWM, and the current waveforms and $3{\Phi}$ power waveforms are analyzed by FFT under various running conditions. By the performance analysis through the experiments, the following results have been obtained. AC source of pseudo sine waveform can be obtained from the modulated alternating square voltage by means of the well designed LC filter. It is confirmed that current waveforms and $3{\Phi}$ power waveforms can be improved by utilizing the high order low pass LC filter than that of lower order. Especially, current waveforms and $3{\Phi}$ power waveforms tan be much improved at low frequency domain. $3{\Phi}$ power waveforms have a smatter ripple and bigger power by utilizing the high order low pass LC filter than that of lower order. Also, the running condition of $3{\Phi}$ AC motor is good at low frequency domain.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.4
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• pp.20-30
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• 2001

A novel 200 MHz CMOS transconductor using translinear cells is proposed. The proposed transconductor consists of voltage followers and current followers based on translinear cells and a resistor. For wide applications, a single-input single-output, a single-Input differential-output, and a fully-differential transconductor are systematically designed, respectively. The theory of operation is described and computer simulation results are used to verify theoretical predictions. The results show that the fully-differential transconductor has a linear input voltage range of ${\pm}2.7$ V, a 3 dB frequency of 200 MHz, and a temperature coefficient of less than 41 $ppm/^{\circ}C$ at supply voltages of ${\pm}3$ V. In order to certify the applicability of the fully-differential transconductor, A ladder-type 3th-order cllitic low pass filter is also designed based on the inductance simulation method. The filter has a ripple bandwidth of 22 MHz, a pass-band ripple of 0.36 dB, and a cutoff frequency of 26 MHz.