• Title/Summary/Keyword: logic language

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A Study of the Visual Irony of a Painting Using 'Dépaysement' ('데페이즈망(Dépaysement)'을 통해 본 회화의 시각적 아이러니(Irony)연구)

  • Moon, Ji-Hye
    • Journal of the Korea Convergence Society
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    • v.11 no.4
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    • pp.165-172
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    • 2020
  • The purpose of this study is to primarily explore the characteristics of 'irony' and focus on the process of visualizing it. 'Irony' is one of the rhetorics used to describe the context or situational aspects of writing. This 'Dépaysement' that appears in art history corresponds to 'ironic' rhetoric in writing. 'Dépaysement' is a combination of techniques, which conveys a message through de-familiarizing rhetoric. With the images conflicting with each other in logic on the same canvas. 'Dépaysement' and 'ironic' rhetoric have commonalities in that they produce a situation with opposite or contradictory images and obscure the images and the situation by distorting them into being different from what has usually been known. In conclusion, Ironic Characteristics and Visual technique elements of dépaysement are identical, this study attempts to understand the visual language by analyzing 'the visual irony' that appears in artworks.

Design and FPGA Implementation of a High-Speed RSA Algorithm for Digital Signature (디지털 서명을 위한 고속 RSA 암호 시스템의 설계 및 FPGA 구현)

  • 강민섭;김동욱
    • The KIPS Transactions:PartC
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    • v.8C no.1
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    • pp.32-40
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    • 2001
  • In this paper, we propose a high-speed modular multiplication algorithm which revises conventional Montgomery's algorithm. A hardware architecture is also presented to implement 1024-bit RSA cryptosystem for digital signature based on the proposed algorithm. Each iteration in our approach requires only one addition operation for two n-bit integers, while that in Montgomery's requires two addition operations for three n-bit integers. The system which is modelled in VHDL(VHSIC Hardware Description Language) is simulated in functionally through the use of $Synopsys^{TM}$ tools on a Axil-320 workstation, where Altera 10K libraries are used for logic synthesis. For FPGA implementation, timing simulation is also performed through the use of Altera MAX + PLUS II. Experimental results show that the proposed RSA cryptosystem has distinctive features that not only computation speed is faster but also hardware area is drastically reduced compared to conventional approach.

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The Implementation of C Cross-Compiler for ES-C2340 DSP2 by Using the GNU Compiler (GNU 컴파일러를 이용한 ES-C2340 DSP2용 C 교차 컴파일러의 개발)

  • Lee, Si-Yeong;Gwon, Yuk-Chun;Yu, Ha-Yeong;Han, Gi-Cheon;Kim, Seung-Ho
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.1
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    • pp.255-269
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    • 1997
  • In this paper, we describe the implementation of C cross-compiler for the ES-C2340 DSP2 processor by using the GNU compiler. For the rapid and efficient developing of the compiler and other parts like the processor-dependent back -end which is implemented newly to build the compiler. This approach has several advantages. First, as we use GNU compiler's well-proved excellent optimization method and multi-language support capability, we can improve he efficiency and generality of the compiler. Second, as we concentrate on the high-level language as logic approving tool in processor developing process. And to support the cross-compiler, we also implement a text-level pre-linker.

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A Description of English Relative Clauses With conceptual Structure Theory (개념구조론에 의한 영어 관계절의 기술)

  • KihoCho
    • Korean Journal of Cognitive Science
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    • v.4 no.2
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    • pp.29-51
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    • 1994
  • This paper presents a new approach to describing the meanings of English relative clauses with the theoretical framework of Conceptual Structure Theory (henceforth CST)which builds on the pionerring work of Sowa.And this paper aims at proposing some extensions to his work. CST describes the conceptual structrures of sentences with conceptual graphs(henceforth CG). which have begun to be used as an intermediate language in natural language processing and machine translation of computer.CGs are composed of concept types and conceptual relation types. They are a system of logic for semantic representation of sentences. This paper focuses on showing the differences of the CGs according to the functions of English relative clauses. English relative clauses are divided into restrictive and nonrestrictive uses.And this paper describes a restrictive clause with a CG including a expression.which derives from the viewpoint of Montague-semantics and Nom-S Analysis.This paper deals mainly with the relative clauses of double restroction as an example of restrictive relative clauses.The description of a nonrestrictive relative clause does not need any-expression, for it doesn's involve the meaning of set.And this paper links the CG of an appositive relative clause,which is a kind of nonrestrictive clauses,to the concept of the antecedent in the main clause.The description of a nonrestrictive relative clause with adverbial meaning is strated with two CGs for the main clause and the relative clause.They are linked with an appropriate intersentential conceptual relation type according to the contextual realtions between them.This paper also presents a CG of a sentential relative clause,which gives a comment on the main clause.

A Study of Designing the Knowledge Base System for the Query Extension by Index File (색인파일 기반의 질의어 확장용 지식베이스 구축에 관한 연구)

  • Seo, Whee
    • Journal of Korean Library and Information Science Society
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    • v.40 no.2
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    • pp.139-159
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    • 2009
  • This study is to develop knowledge base system for query extension to the user oriented information retrieval. This study has survey the theories of the concept-based information retrieval method and statistic based information retrieval method. In the construction method of knowledge base, the common hypothesis is that the emergence of related term is the frequency of simultaneous emergence of a set of documents. Using the subject index file algorithms and the 'and' operator of boolean logic based on this hypothesis, this study builds the knowledge base. In this research experiment, a subject of knowledge base is education. Using the book of the Introduction to Education, two experimental knowledge base systems is constructed by the different indexing method. One system has constructed by controlled language indexing method, and another system has constructed by natural language indexing method. The performance of two knowledge base system is evaluated.

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Implementation of a backend system for real-time intravascular ultrasound imaging (실시간 혈관내초음파 영상을 위한 후단부 시스템 구현)

  • Park, Jun-Won;Moon, Ju-Young;Lee, Junsu;Chang, Jin Ho
    • The Journal of the Acoustical Society of Korea
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    • v.37 no.4
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    • pp.215-222
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    • 2018
  • This paper reports the development and performance evaluation of a backend system for real-time IVUS (Intravascular Ultrasound) imaging. The developed backend system was designed to minimize the amount of logic and memory usage by means of efficient LUTs (Look-up Tables), and it was implemented in a single FPGA (Field Programmable Gate Array) without using external memory. This makes it possible to implement the backend system that is less expensive, smaller, and lighter. The accuracy of the backend system implemented was evaluated by comparing the output of the FPGA with the result computed using a MATLAB program implemented in the same way as the VHDL (VHSIC Hardware Description Language) code. Based on the result of ex-vivo experiment using rabbit artery, the developed backend system was found to be suitable for real-time intravascular ultrasound imaging.

Scalable FFT Processor Based on Twice Perfect Shuffle Network for Radar Applications (레이다 응용을 위한 이중 완전 셔플 네트워크 기반 Scalable FFT 프로세서)

  • Kim, Geonho;Heo, Jinmoo;Jung, Yongchul;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.22 no.5
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    • pp.429-435
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    • 2018
  • In radar systems, FFT (fast Fourier transform) operation is necessary to obtain the range and velocity of target, and the design of an FFT processor which operates at high speed is required for real-time implementation. The perfect shuffle network is suitable for high-speed FFT processor. In particular, twice perfect shuffle network based on radix-4 is preferred for very high-speed FFT processor. Moreover, radar systems that requires various velocity resolution should support scalable FFT points. In this paper, we propose a 8~1024-point scalable FFT processor based on twice perfect shuffle network algorithm and present hardware design and implementation results. The proposed FFT processor was designed using hardware description language (HDL) and synthesized to gate-level circuits using $0.65{\mu}m$ CMOS process. It is confirmed that the proposed processor includes logic gates of 3,293K.

A dedicated line operating and maintenance system design based on UML (UML 기반 전용회선 운용관리시스템 설계)

  • 조동권
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.6
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    • pp.827-832
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    • 2002
  • The development of dedicated network management system is essential to meet the following conditions: the system must run the configuring and repair processing for the dedicated communication network, and can manage new next generation data dedicated communication network of various types. In general it is effective that the system is consisted of decentralized module to be accessible for business logic and datum to remote area. To solve these problems, a method is to use object-oriented design techniques. That is, it is to abstract reusability objects and make component module using the abstracted objects. In this paper, we propose a management system of dedicated communication network service using object-oriented design techniques which are UML(Unified Modeling Language).

GML Document Editing and Translation System based on Vector Graphic (벡터 그래픽 기반의 GML 문서 편집 및 변환 시스템)

  • Kim, Chang-Su;Yeom, Sung-Keun;Jung, Hoe-Kyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1058-1064
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    • 2009
  • According to development of Information Technology and generalization of internet, practical use field of geography information became various. Therefor various Geographic Information System (GIS) constructed to manage geography information efficiently. However, geography information data of various form is depending on graphic authorizing tool of various form being not normalized each other. So, OGC(Open Geospatial Consortium) proposed GML(Geography Markup Language) that describe normalized geography information data that can apply mutually and W3C proposed SVG(Scalable Vector Graphics) of vector base. In this paper creates GML data of XML base for geography information data processing to vector graphic object, and design and implementation of GML document editing and translation system that define code converter that create GML document through created graphic objects and change vector graphic to logic structure of XML base.

A Synthesis Method of Software Fault Tree from NuSCR Formal Specification using Templates (템플릿에 기반한 NuSCR 정형 명세의 소프트웨어 고장 수목 생성 방법)

  • Kim, Tae-Ho;Yoo, Jun-Beom;Cha, Sung-Deok
    • Journal of KIISE:Software and Applications
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    • v.32 no.12
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    • pp.1178-1191
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    • 2005
  • In this paper, we propose a synthesis method of software fault tree from software requirements specification written in NuSCR formal specification language. The software fault tree, proposed in this paper, reflects requirements on both structure and behavior and it is an integrated form. The software fault tree can be used for analyzing safety in the view of structure and behavior. We propose templates for each components in NuSCR specification language and a synthesis method of software fault tree using the templates. The research was applied into the main trip logic of the reactor protection system of ARP1400, the Korean next generation nuclear reactor system, developed by KNICS. And we evaluate feasibility of our approach through this case study.