• Title/Summary/Keyword: logic device

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A Simple Static Noise Margin Model of MOS CML Gate in CMOS Processes

  • Jeong, Hocheol;Kang, Jaehyun;Lee, Kang-Yoon;Lee, Minjae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.370-377
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    • 2017
  • This paper presents a simple noise margin (NM) model of MOS current mode logic (MCML) gates especially in CMOS processes where a large device mismatch deteriorates logic reliability. Trade-offs between speed and logic reliability are discussed, and a simple yet accurate NM equation to capture process-dependent degradation is proposed. The proposed NM equation is verified for 130-nm, 110-nm, 65-nm, and 40-nm CMOS processes and has errors less than 4% for all cases.

Advances in Package-on-Package Technology for Logic + Memory Integration

  • Scanlan Christopher
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2005.09a
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    • pp.111-129
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    • 2005
  • Pop provides OEMs and EMS with a platform to cost effectively expand options for logic + memory 3D integration - Expands device options by simplifying business logistics of stacking - Integration controlled at the system level to best match stacked combinations with system requirements - Eliminates margin stacking and expands technology reuse - Helps manage the huge cost impacts associated with increasing demand for multi media processing and memory. PoP is well timed to enable and leverage: - Mass customization of systems for different use (form, fit and function) requirements o Bband and apps processor + memory stack platforms - Logic transition to flip chip enables PoP size reduction o Area and height reduction. Industry standardization is progressing. Amkor provides full turn-key support for base package, memory package and full system integration.

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Development of Intelligent Landscape Lighting Power Control and Monitoring System with Solar Cell Generator Equipment (태양광발전설비와 연계한 지능형 경관조명 전력제어 및 모니터링 시스템의 개발)

  • Kim, Dong-Wan;Park, Sung-Won;Kim, Hyung-Su
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.60 no.2
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    • pp.99-104
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    • 2011
  • In this paper, the intelligent landscape lighting power control and monitoring system with solar sell generator equipment is proposed. The first, the intelligent landscape lighting power controller is designed using the fuzzy logic control method. And the fuzzy logic controller is used to save power consumption for various reference intensity of the illumination. The second, the GUI monitoring system is presented. It has control and display faculty. And the practical experiment device is used to evaluate the performance criteria of the proposed intelligent landscape lighting power control system with the solar cell power generation equipment. From the experiment results, we present the property of proposed fuzzy controller such as steady state error, the tracking and power consumption characteristic for the reference intensity of illumination. And also we show the superiority of power control as well as the characteristic of GUI monitoring system in the proposed system.

An Implementation of PC based digital logic interface (DIGITAL LOGIC INTERFACE구현)

  • Min, Jin-Kyung;Oh, Hun;Cho, Hyeon-Seob;Ryu, In-Ho;Kim, Hee-Sook
    • Proceedings of the KIEE Conference
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    • 2004.07d
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    • pp.2487-2488
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    • 2004
  • In suite or the presence or various kind of Integrated Circuits it's not always easy to get the right part. Besides, it is hard to find a vendor for a small quantity consumers like who develop prototype applications. In this study, we've tried to get the logical signals from the PC based device we've developed that correspondents with the real ICs. It can emulate decoder ICs, multiplexers, demultiplexers and basic logic gates.

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Development of Temperature control system for kimchi-refrigerator using fuzzy logic

  • Jung, Kwang Sik;No, Young Iun;Lim, Young Chel;Ryoo, Young Jae;Ahn, Min Tae
    • 제어로봇시스템학회:학술대회논문집
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    • 2002.10a
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    • pp.111.2-111
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    • 2002
  • The temperature of Kimchi-refrigerator is controlled by the wishing condition the original taste of Kimchi, the fast precocity of Kimchi. In this paper we studied the controlling temperature of Kimchi-refrigerator. The controlling temperature of Kimchi refrigerator is based on microcontroller which control On/Off. In this paper, Fuzzy logic was used to control the temperature of Kimchi-refrigeration. I will apply to fuzzy logic control to have simple rule control on the place of On-Off control system in the past. This device controls the in order to measure several temperature of two refrigeration plant in Kimchi refrigerator solenoid valve in refrigeration plant. A solenoid valve...

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A Study on the Metastabel Phenomena and its Improvement Method in the Synchronizer (Synchronizer의 Metastable 현상 및 그의 개선 방법에 관한 연구)

  • 정연만;이종각
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.14 no.5
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    • pp.1-6
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    • 1977
  • When the input of synchronizer which is used for the purpose of synchronizing the master clock of computer with the interrupt system, a sort of random variable device, is gated with asynchronous intersection of the fall time of the master clock and the risetime oi the interrupt request, synchronizer is drived in Metastable region. This paper is presented circuit analysis of Metastable phenomena and analysis for transient process from metastable point to stable state, and also realities the collect logic with Inverter and open collector methods with a view to improving logic failure caused by the mishappen phenomena.

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Switch Level Logic Simulator Using Polynomial MOS Delay Model (다형식 MOS 지연시간 모델을 이용한 스윗치레벨 논리 시뮬레이터)

  • Jun, Young-Hyun;Jun, Ki;Park, Song-Bai
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.6
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    • pp.700-709
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    • 1988
  • A new technique is proposed for switch-level logic simulation for NMOS and CMOS logic circuits. For the simple inverter the rise or fall delay time is approximated by a product of polynomials of the input waveform slope, the output loading capacitance and the device configuration ratio, the polynomial coefficients being so determined as to best fit the SPICE simuladtion results for a given fabrication process. This approach can easily and accurately be extened to the case of multiple input transitions. The simulation results show that proposed method can predict the delay times within 5% error and with a speed up by a factor of three orders of magnitude for several circuits tested, as compared with the SPICE simulation.

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An Implementation of PC based digital logic interface (Digital 로직 인터페이스 개발)

  • Cho, Hyun-Sub;Oh, Hoon;Kim, Hee-Sook;Yoo, In-Ho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.5 no.1
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    • pp.26-28
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    • 2004
  • In spite of the presence of various kind of Integrated Circuits it's not always easy to get the right part. Besides, it is hard to find a vendor for a small quantity consumers like who develop prototype applications. In this study, we've tried to get the logical signals from the PC based device we've developed that correspondents with the real ICs. It can emulate decoder ICs, multiplexers, demultiplexers and basic logic gates.

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An Implementation of PC based digital logic Interface (PC기반의 DIGITAL LOGIC INTERFACE구현)

  • Cho, Hyeon-Seob;Song, Yong-Hwa;Ryu, Byoung-Sik;Kim, Su-Yong;Kim, Hee-Suk
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.2802-2803
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    • 2000
  • In spite of the presence of various kind of Integrated Circuits it's not always easy to get the right part. Besides, it is hard to find a vendor for a small Quantity consumers like who develop prototype applications. In this study, we've tried to get the logical signals from the PC based device we've developed that correspondents with the real ICs. It can emulate decoder ICs, multiplexers, demultiplexers and basic logic gates.

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A FPGA Development for the Fail Safe Control of TMR System (TMR시스템의 고장안전제어를 위한 FPGA 개발)

  • 강민수;이정석;김현기;유광균;이기서
    • Proceedings of the KSR Conference
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    • 2000.05a
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    • pp.336-343
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    • 2000
  • This paper proposes the failsafe control logic. which has applied to the voting on the TMR system by using FPGA The self-detection circuit is also designed for detecting a characteristic of fault at TMR system. The fault producing in the self-detection system is largely classified among an intermittent fault, a transient fault and a permanent fault. If it is happened to the permanent fault, the system can be failed. Therefore, it is designed the logic circuit which is not transferred the permanent fault to the system after shut off output. The control logic of the Fail Safe proposed in the paper is required for a circuit integrate of device to minimize the failure happened. Therefore, it makes to design FPGA with modeling of VHDL. The circuit of the Fail Safe of TMR system is able to apply to nuclear system, rail-way system, aerospace and aircraft system which is required for high reliability.

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