• Journal of Advanced Navigation Technology
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• v.13 no.6
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• pp.846-853
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• 2009

This paper presents the design of a high efficiency frequency multiplier with load-pull simulation and analyses the nonlinear distortion of the frequency multiplier. The frequency multiplier shows serious distortion of multiplying signal bandwidth because of nonlinearity when modulated signal is applied, so a digital predistortion with look up table (LUT) is applied to compensate for the distortion of the frequency multiplier. The frequency multiplier is designed to produce 5.8GHz output by doubling the input frequency to be operating at IEEE 802.11a standard wireless LAN. The output spectrum shows 12dB ACPR improvement both at +11MHz, +20MHz offset from center frequency after linearization.

• Journal of Advanced Marine Engineering and Technology
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• v.24 no.3
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• pp.106-112
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• 2000

Since the oil crisis, we have been concerned about the energy saving techniques of electric generating systems. As a part of the effort to save energy, automatic electric load sharing device was developed. Usually, ship's electric generating system consists of two or three sets of generator. And, electric generating system is operated as single or parallel operation mode according to the demanded electric power. Therefore, it is important to investigate generators operating mode for the supply of required electric power in the ship in order to decrease the operating cost. So, this paper suggests the method to solve the optimal electric load distribution problem by dynamic programming. And, this thesis indicates that the proposed method is superior to the lagrange multiplier's method in obtaining optimal load distribution solution in the ship's electric generating system.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.21 no.3
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• pp.271-279
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• 2011

In this study, the dynamic analysis of a beam is analyzed by using the finite element method when the beam has moving mass and axial load. To consider the contact force between the moving mass and beam, coupled nonlinear equations of contact dynamics are derived, and then the weak form for the finite element method is established. The finite element computer programs based on the Lagrange multiplier method are developed to compute the contact force. Furthermore, a variety of simulations are performed for various design parameters such as moving mass velocity, compressive axial load and tension load. Finally, relations between the dynamic response and contact force are also discussed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.8
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• pp.1566-1571
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• 2011

The objective of this paper is to present a quantitative analysis leading to the assessment of optimum terminating impedances in the design of active frequency multipliers. A brief analysis of the basic principal of the GaAs FET frequency multiplier is presented. The analysis is outlined in bias optimization and drive power determination. Utilizing the equivalent circuit model of GaAs FET, we have simulated the optimized load impedance for the maximum output of the active frequency multipliers. The C-class and reverse C-class frequency doublers have been fabricated and the load impedances have been measured. The experimental results are in good agreement with the estimated results in the simulation with the accuracy of 90%.

• Journal of Advanced Marine Engineering and Technology
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• v.26 no.3
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• pp.313-319
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• 2002

Since the oil crisis in 1970, a great deal of effort has been made to develop automatic electric load sharing systems as a part of the efforts to save energy. A large scale electric generating system composes more than two generators whose characteristics may be different. When such a system is operated individually or in parallel, the lagrange multiplier's method has difficulty in achieving optimal load distribution because generators usually have the limitations of the operating range with inequality constraints. Therefore, a suitable operating mode of generators has to be decided according to the selection of the generators to meet electric power requirements at the minimum cost. In this study, a method which solves the optimal electric load distribution problem using the dynamic programming technique is proposed. This study also shows that the dynamic programming method has an advantage in dealing with the optimal load distribution problem under the limitations of the operating range with inequality constraints including generator operation mode. In this study, generator operating cost curve of second order equation by shop trial test results of diesel generators are used. The results indicate that the proposed method can be applied to the ship's electric generating system.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2001.10a
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• pp.17-20
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• 2001

This paper presents the results of an elastic buckling analysis of elastically restrained orthotropic plate with a longitudinal stiffener under in-plane linearly distributed load. It is assumed that the loaded edges of web plate are simply supported and other two edges are elastically restrained against rotation. The stiffener is modeled as a beam element and its torsional rigidity is neglected. For the buckling analysis Lagrangian multiplier method is employed. The effects of restraint and longitudinal stiffener are presented in a graphical form.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.537-538
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• 2008

A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

• Transactions of Materials Processing
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• v.8 no.1
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• pp.47-56
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• 1999

The governing functional in plastic deformation has to satisfy the incompressibility constraint. This incompressibility constraint imposed on velocity fields can be removed by introducing either Lagrange multiplier or the penalty constant into the functional. In this study, two-dimensional rigid plastic FEM programs using these schemes were developed. These two programs and DEFORM were applied in a cylinder upsetting and a closed die forging to compare the values of load, local mean stress and volume loss. As the results, the program using Lagrange multiplier obtained a more exact and stable solution, but it took more computational time than the program using the penalty constant. Therefore, according to user's need, one of these two programs can be chosen to simulate a metal forming processes.

• Journal of electromagnetic engineering and science
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• v.14 no.1
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• pp.25-30
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• 2014

This paper discusses the design of a high frequency Greinacher voltage multiplier as rectifier; it has a greater conversion efficiency and higher output direct current (DC) voltage at high power compared to a simple halfwave rectifier. Multiple diodes in the Greinacher voltage multiplier with distributed circuits consume excited power to the rectifier equally, thereby increasing the overall power capacity of the rectifier system. The proposed rectifiers are a Greinacher voltage doubler and a Greinacher voltage quadrupler, which consist of only diodes and distributed circuits for high frequency applications. For each rectifier, the RF-to-DC conversion efficiency and output DC voltage for each input power and load resistance are analyzed for the maximum conversion efficiency. The input power with maximum conversion efficiency of the designed Greinacher voltage doubler and quadrupler is 3 and 7 dB higher, respectively;than that of the halfwave rectifier.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.7A
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• pp.568-573
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• 2009

This paper presents a step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in O.13um CMOS standard process. In an effort to decrease system volume, this paper proposes the on chip compensation circuit using capacitor multiplier method. Capacitor multiplier method can minimize error amplifier's compensation capacitor size by 10%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87.2% for the output voltage of 1.2V (input voltage : 3.3V), maximum load current 500mA, and 25mA output ripple current. This voltage mode controled buck converter has 1MHz switching frequency.