• 제목/요약/키워드: inductors and capacitors

검색결과 117건 처리시간 0.024초

내장형 수동소자의 제조를 위한 포토 이미징 후막리소그라피 기술 (Photo-imageable Thick-Film Lithography Technology for Embedded Passives Fabrication)

  • 임종우;김효태;김종희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.303-303
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    • 2007
  • Photo-imageable thick-film lithography technology was developed for the fabrication of embedded passives such as inductors and capacitors. In this study, photo-imageable dielectric and conductor pastes have apoted a negative type. Sodalime glass wafer, alumina substrate and zero-shrinkage LTCC green tapes were used as substrates. In result, The lithographic patterns were designed as lines and spaces for conductor material, or via-holes for ceramic, LTCC, materials. The scattering and reflection of UV-beam on the substrate had negative effects on fine patterning. The patterning performance was varied with the exposing and developing process conditions, and also varied with the substrate materials. Fine resolution of less then $50/50{\mu}m$ in line and space was obtained, which is difficult in screen printing method.

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Study of a SEPIC-input Self-driven Active Clamp ZVS Converter

  • Cao, Guo-En;Kim, Hee-Jun
    • Journal of international Conference on Electrical Machines and Systems
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    • 제2권2호
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    • pp.202-215
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    • 2013
  • This paper proposes a SEPIC-input, self-driven, active clamp ZVS converter, where an auxiliary winding and a RC delay circuit are employed to drive the active clamp switch and to achieve asymmetrical duty control without any other extra circuits. Based on the fixed dead time and the resonance between capacitors and inductors, both the main switch and the auxiliary switch can rule the ZVS operation. Detailed operation modes are presented to illustrate the self-driven and ZVS principles. Furthermore, an accurate state-space model and the transfer functions of the proposed converter have been presented and analyzed in order to optimize dynamic performance. The model provides efficient prediction of converter operations. Experimental results, based on a prototype with 80V input and 15V/20A output, are discussed to verify the transient and steady performance of the proposed converter.

Semi-lumped Balun Transformer using Coupled LC Resonators

  • Park, Jongcheol;Yoon, Minkyu;Park, Jae Yeong
    • Journal of Electrical Engineering and Technology
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    • 제10권3호
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    • pp.1154-1161
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    • 2015
  • This paper presents a semi-lumped balun transformer using conventional PCB process and its design theory and geometry for the maximally flat response and wide bandwidth using magnetically coupled LC resonators. The proposed balun is comprised of two pairs of coupled resonators which share one among three LC resonators. It provides an identical magnitude and phase difference of 180° between two balanced ports with DC isolation and an impedance transformation characteristic. Theoretical design and analysis were performed to optimize the inductance and capacitance values of proposed balun device for obtaining the wide bandwidth and maximally flat response in its pass-band. Three balun transformers with a center frequency of 500 MHz were demonstrated for proving the concept of design proposed. They were fabricated by using lumped chip capacitors and planar inductors embedded into a conventional 4-layered PCB substrate. They exhibited a maximum magnitude difference of 0.8 dB and phase difference within 2.4 degrees.

Control-to-output Transfer Function of the Open-loop Step-up Converter in CCM Operation

  • Wang, Faqiang;Ma, Xikui
    • Journal of Electrical Engineering and Technology
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    • 제9권5호
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    • pp.1562-1568
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    • 2014
  • Based on the average method and the geometrical technique to calculate the average value, the average model of the open-loop step-up converter in CCM operation is established. The DC equilibrium point and corresponding small signal model is derived. The control-to-output transfer function is presented and analyzed. The theoretical analysis and PSIM simulations shows that the control-to-output transfer function includes not only the DC input voltage and the DC duty cycle, but also the two inductors, the two energy-transferring capacitors, the switching frequency and the load. Finally, the hardware circuit is designed, and the circuit experimental results are given to confirm the effectiveness of theoretical derivations and analysis.

Circuit Model Analysis for Traces that Cross a DGS

  • Jung, Kibum;Lee, Jongkyung;Chung, Yeon-Choon;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • 제12권4호
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    • pp.240-246
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    • 2012
  • This paper presents a novel modeling technique for traces that cross a defected ground structure. A simple and accurate equivalent circuit model provides clear insight into the coupling mechanism between a microstrip line and a slot or split. The circuit models consist of a transformer as the coupling mechanism and LC resonators as the ground with a slot or split structure. Resistors, capacitors, and inductors are added to the model to increase accuracy and equivalence at high frequency. Simulated and measured S-parameters are presented for defected ground structures. The accuracy and validity of the proposed equivalent circuit model is verified by evaluation of the S-parameter characteristics of the defected ground structures and comparison with measured results.

IMT-2000용 CMOS 저잡음증폭기 설계 (CMOS Low Noise Amplifier Design for IMT-2000)

  • 김신철;이상국
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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    • pp.333-336
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    • 2000
  • This paper describes a CMOS low noise amplifier (LNA) with bias current reusing architecture intended lot use in the front-end of IMT-2000 receiver. It has been implemented in a 0.35$\mu\textrm{m}$ CMOS process with two poly and four metal layers. In order to accuracy of simulation, we considered a bonding wire and a pad effect and used the measurements of capacitors and on-chip inductors which implemented in the same process. The LNA has a forward gain (S21) of 17 ㏈ and a noise fjgure of 1.26 ㏈. And it has a third-order intermodulation intercept point (IP3) of +3.15 ㏈m and a 1㏈ compression point (P1㏈) of -16 ㏈m, input referred, respectively. The power consumption is 19 ㎽ from a 3V supply.

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적층 유기기판 내에 내장된 소형 LC 다이플렉서의 설계 및 제작 (Design and Fabrication of Miniaturized LC Diplexer Embedded into Organic Substrate)

  • 이환희;박재영;이한성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.262-263
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    • 2007
  • In this paper, fully embedded and miniaturized diplexer has been designed, fabricated, and characterized for dual-band/mode CDMA handset applications. The size of the embedded diplexer is significantly reduced by embedding high Q circular spiral inductors and high DK MIM capacitors into low cost organic package substrate. The fabricated diplexer has insertion losses and isolations of -0.5 and -23dB at 824-894MHz and -0.7 and -22dB at 1850-1990MHz, respectively. Its size is 3.9mm$\times$3.9mm$\times$ 0.77mm (height). The fabricated diplexer is the smallest one which is fully embedded into low cost organic package substrate.

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Virtual Qualification을 통한 자동차용 전장부품의 수명 평가 (Life Assessment of Automotive Electronic Part using Virtual Qualification)

  • 이해진;이정윤;오재응
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2005년도 추계학술대회논문집
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    • pp.143-146
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    • 2005
  • In modern automotive control modules, mechanical failures of surface mounted electronic components such as microprocessors, crystals, capacitors, transformers, inductors, and ball grid array packages, etc., are mai or roadblocks to design cycle time and product reliability. This paper presents a general methodology of failure analysis and fatigue prediction of these electronic components under automotive vibration environments. Mechanical performance of these packages is studied through finite element modeling approach fur given vibration environments in automotive application. Using the results of vibration simulation, fatigue lift is predicted based on cumulative damage analysis and material durability information. Detailed model of solder/lead joints is built to correlate the system level model and obtain solder strains/stresses. The primary focus in this paper is on surface-mount interconnect fatigue failures and the critical component selected for this analysis is 80 pin plastic leaded microprocessor.

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Two-Inductor Non-Isolated DC-DC Converter with High Step-Up Voltage Gain

  • Lee, Sze Sing;Chu, Bing;Lim, Chee Shen;Lee, Kyo-Beum
    • Journal of Power Electronics
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    • 제19권5호
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    • pp.1069-1073
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    • 2019
  • In this paper, an alternative non-isolated DC-DC converter with a high voltage boosting capability is proposed. Two inductors are used and one of them has its flux linkage increases during its charging period to achieve a high step-up voltage gain. Among the three integrated capacitors, one portrays the partial characteristic of the switched-capacitor technique, while the other two are connected in series across the load. With the two switches controlled using the same duty cycle, the proposed topology demonstrates the merits of a higher and wider range of step-up voltage gain when compared with recent topologies. In addition, a reduction in loss is induced and a higher efficiency is ensured with all the voltage stresses constrained within the output voltage. Operation of the proposed converter is analyzed and validated through experimental results obtained with a prototype.

직력 캐패시터를 가진 E급 공진형 정류기 설계에 관한 연구 (A Study on the Design of the Class E Resonant Rectifier with a Series Capacitor)

  • 김남호
    • Journal of Advanced Marine Engineering and Technology
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    • 제22권3호
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    • pp.343-352
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    • 1998
  • Higher frequency of energy transfer or at least energy conversion has to be used in order to reduce the size of inductors and capacitors required in the power supplies. Conventional PWM switching-mode power supplies have a limitation of operating frequency due to switching losses in the switching transistors and rectifier diodes. Means of reducing switching losses have been developed for high-frequency resonant amplifiers or more exactly dc/ac inverters. Because of smooth current and voltage waveforms resonant convertesrs havelower device switching losses and stresses lower electromagnetic interference(EMI) and lower noise than PWM converters. Therefore in this paper design equations of Classs E resonant low dv/dt rectifier with a series resonant capacitor drived using Fourier series techniques. The theory is compared with simulation results obtained for the rectifier operating at 10[MHz] ac input and 5[V] coutput.

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