• Title/Summary/Keyword: inductors and capacitors

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Dual-Band Power Divider Using CRLH-TL (CRLH 전송 선로 구조를 이용한 이중 대역 전력 분배기)

  • Kim, Seung-Hwan;Sohn, Kang-Ho;Kim, Ell-Kou;Kim, Young;Lee, Young-Soon;Yoon, Young-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.8
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    • pp.837-843
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    • 2008
  • This paper proposes a power divider based on meta-material structure with dual-band operation. The meta-material structures of left-hand characteristic are constituted of series capacitors and shunt inductors, but they have parasitic series inductance and shunt capacitance effects. There is represented the composite right/ left-handed transmission line (CRLH-TL) model. When the power divider is implemented by using the CRLH-TL, the power divider can operate dual band. To verify the power divider with dual band, we are implemented to operate dual-band that is 0.88 GHz and 1.67 GHz. The characteristics of divider have the return loss less than each 21.0 dB and 15.8 dB and the insertion loss better than 3.83 dB and 3.64 dB at each frequency. Also, the output phase difference is $3{\sim}6^{\circ}$.

Design of High Performance LNA Based on InGaP/GaAs HBT for 5.4㎓ WLAN Band Applications (InGaP/GaAs HBT를 이용한 5.4㎓ 대역의 고성능 초고주파 집적회로 저잡음 증폭기 설계)

  • 명성식;전상훈;육종관
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.7
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    • pp.713-721
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    • 2004
  • This paper presents a high Performance LNA based on InGaP/GaAs HBT for 5.4㎓ WAM band applications. During the past days, InGaP/GaAs HBT has been being used for mainly high power amplifiers, but InCaP/GaAs is recognized as a suitable device for RF single chip. At this point, the research about a high performance LNA based on InGaP/GaAs HBT must be preceded, and in this paper, a excellent linearity and noise characteristics LNA based on InGaP/GaAs HBT is desisted and fabricated. The LNA is integrated in new of 0.9${\times}$0.9$\textrm{mm}^2$ single chip with high Q spiral inductors and MIM capacitors. The proposed LNA is biased at current point for optimum noise figure and gain characteristics, futhermore, excellent linearity is achieved. The proposed LNA shows 13㏈ gain, 2.1㏈ noise figure, and excellent linearity in terms of IIP3 of 5.5㏈m.

Implementation of Elliptic LPF using LTCC Passive Library Elements for 5G Band (LTCC 수동소자 라이브러리를 활용한 5G 대역 일립틱 LPF 구현)

  • Cho, Hak-Rae;Koo, Kyung Heon
    • Journal of Advanced Navigation Technology
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    • v.24 no.6
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    • pp.573-580
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    • 2020
  • In this paper, the characteristics of the inductor and capacitor, which are the basic components of the circuit, are constructed in a form that can be used in the LTCC multilayer. The inductors and capacitors used for the analysis were designed with rectangular spiral structures and MIM structures inside dielectrics with a dielectric constant of 7, respectively. The measured results were extracted from each element of the equivalent circuit proposed by the curve fitting method and verified the validity of the proposed equivalent circuit based on the extracted results. The analyzed inductor and capacitor were implemented in the form of library and proved its usefulness by applying to Elliptical type 5th LPF design. The LPF was measured through practical production, and as a result, the insertion loss in the passband DC ~ 3.7 GHz was up to 1.0 dB, the return loss was 19.2 dB, and the attenuation in the rejection band was 23.9 dB, which was close to the design goal.

Development of the Organic Solar Cell Technology using Printed Electronics (인쇄전자 기술을 이용한 유기 태양전지 기술 개발)

  • Kim, Jungsu;Yu, Jongsu;Yoon, Sungman;Jo, Jeongdai;Kim, Dongsoo
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.113.1-113.1
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    • 2011
  • PEMS (printed electro-mechanical system) is fabricated by means of various printing technologies. Passive and active compo-nents in 2D or 3D such as conducting lines, resistors, capacitors, inductors and TFT(Thin Film Transistor), which are printed withfunctional materials, can be classified in this category. And the issue of PEMS is applied to a R2R process in the manu-facturing process. In many electro-devices, the vacuum process is used as the manufacturing process. However, the vacuum process has a problem, it is difficult to apply to a continuous process such as a R2R(roll to roll) printing process. In this paper, we propose an ESD (electro static deposition) printing process has been used to apply an organic solar cell of thin film forming. ESD is a method of liquid atomization by electrical forces, an electrostatic atomizer sprays micro-drops from the solution injected into the capillary with electrostatic force generated by electric potential of about several tens kV. ESD method is usable in the thin film coating process of organic materials and continuous process as a R2R manufacturing process. Therefore, we experiment the thin films forming of PEDOT:PSS layer and active layer which consist of the P3HT:PCBM. The organic solar cell based on a P3HT/PCBM active layer and a PEDOT:PSS electron blocking layer prepared from ESD method shows solar-to-electrical conversion efficiency of 1.42% at AM 1.5G 1sun light illumination, while 1.86% efficiency is observed when the ESD deposition of P3HT/PCBM is performed on a spin-coated PEDOT:PSS layer.

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Design and Operation Characteristics of 2.4MJ Pulse Power System for Electrothermal-Chemical(ETC) Propulsion(I) (전열화학추진용 2.4MJ 펄스파워전원의 설계와 동작특성(I))

  • Jin, Y.S.;Lee, H.S.;Kim, J.S.;Cho, J.H.;Lim, G.H.;Kim, J.S.;Chu, J.H.;Jung, J.W.;Hwang, D.W.
    • Proceedings of the KIEE Conference
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    • 2000.07c
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    • pp.1868-1870
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    • 2000
  • As a drive for an ETC (Electro-thermal Chemical) launcher, a large pulse power system of a 2.4MJ energy storage was designed, constructed and tested. The overall power system consists of eight capacitive 300kJ energy storage banks. In this paper we describe the design features, setup and operation test result of the 300kJ pulsed power module. Each capacitor bank of the 300kJ module consists of six 22kV 50kJ capacitors. A triggered vacuum switch (TVS-43) was adopted as the main pulse switch. Crowbar diode circuits, variable multi-tap inductors and energy dumping systems are connected to each high power capacitor bank via bus-bars and coaxial cables. A parallel crowbar diode stack is fabricated in coaxial structure with two series 13.5kV, 60kA avalanche diodes. The main design parameters of the 300kJ module are a maximum current of 180kA and a pulse width of 0.5 - 3ms. The electrical performances of each component and current output variations into resistive loads have been investigated.

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Fabrication Method of OPV using ESD Spray Coating (ESD 스프레이를 이용한 OPV 제작 기법)

  • Kim, Jungsu;Jo, Jeongdai;Kim, Dongsoo
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.84.2-84.2
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    • 2010
  • PEMS (printed electro-mechanical system) is fabricated by means of various printing technologies. Passive and active components in 2D or 3D such as conducting lines, resistors, capacitors, inductors and TFT, which are printed with functional materials, can be classified in this category. And the issue of PEMS is applied to a R2R process in the manufacturing process. In many electro-devices, the vacuum process is used as the manufacturing process. However, the vacuum process has a problem: it is difficult to apply toa continuous process as a R2R printing process. In this paper, we propose an ESD (electro static deposition) printing process has been used to apply an organic solar cell of thin film forming. ESD is a method of liquid atomization by electrical forces, anelectrostatic atomizer sprays micro-drops from the solution injected into the capillary, with electrostatic force generated by electric potential of about tens of kV. ESD method is usable in the thin film coating process of organic materials and continuous process as a R2R manufacturing process. Therefore, we experiment the thin films forming of PEDOT:PSS layer and Active layer which consist of the P3HT:PCBM. The result of experiment, organic solar cell using ESD thin film coated method is occurred efficiency of about 1.4%. Also, the case of only used to ESD method in the active layer coating is occurred efficiency of about 1.86% as the applying a spin coating in the PEDOT:PSS layer. We can expect that ESD method is possible for continuous process to manufacture in the organic solar cell or OLED device.

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Wiring Test Method of Projectile using Z-Segmentation Algorithm (Z-Segmentation 알고리즘을 이용한 발사체의 배선 점검 방법)

  • Oh, Se-Kwon;Lee, Dae-Hyun;Kim, Yung-Sung;An, Jong-Heum
    • Journal of Advanced Navigation Technology
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    • v.25 no.5
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    • pp.370-376
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    • 2021
  • development of the aerospace industry is increasing the research of projectiles. In addition, many tests are under way and many failures occur accordingly. Projectiles should be able to minimize failures because they are more dangerous than other electronic equipment. Therefore, it is necessary to verify wiring before powering the projectile. Accordingly, the wiring status was verified by resistance measurements. However, the wiring test of the previous resistance measurement method cannot be accurately measured due to devices such as capacitors and inductors in the projectile circuit. In this paper, impedance is measured in the connection state of cables and projectiles using a TDR meter. The Z-Segmentation algorithm is used to set the reference value for the measured steady state impedance. The Z-Segmentation algorithm first finds the peak values of the impedance waveform using a Kalman filter and obtains the final impedance peak segment through segmentation. In this way, the wiring status is determined based on the reference value for the normal state of the wiring.

A Differential Colpitts-VCO Circuit Suitable for Sub-1V Low Phase Noise Operation (1V 미만 전원 전압에서 저 위상잡음에 적합한 차동 콜피츠 전압제어 발진기 회로)

  • Jeon, Man-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.6 no.1
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    • pp.7-12
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    • 2011
  • This paper proposes a differential Colpitts-VCO circuit suitable for low phase noise oscillation at the sub-1V supply voltage. Oscillation with low phase noise at the sub-1V supply voltage is facilitated by employing inductors as the current sources of the proposed circuit. One of the two feedback capacitors of the single-ended Colpitts oscillator in the proposed circuit is replaced with the MOS varactor in order to further reduce the resonator loss. Post-layout simulation results using a $0.18{\mu}m$ RF CMOS technology show that the phase noises at the 1MHz offset frequency of the proposed circuit oscillating at the sub-1V supply voltages of 0.6 to 0.9 V are at least 7 dBc/Hz lower than those of the well-known cross-coupled differential VCO.

Fabrication process of embedded passive components in MCM-D (MCM-D 기판 내장형 수동소자 제조공정)

  • 주철원;이영민;이상복;현석봉;박성수;송민규
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.1-7
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    • 1999
  • We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.

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A Design of Wideband Frequency Synthesizer for Mobile-DTV Applications (Mobile-DTV 응용을 위한 광대역 주파수 합성기의 설계)

  • Moon, Je-Cheol;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.40-49
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    • 2008
  • A Frequency synthesizer for mobile-DTV applications is implemented using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors are chosen for VCO core to reduce phase noise. The measurement result of VCO frequency range is 800MHz-1.67GHz using switchable inductors, capacitors and varactors. We use varactor bias technique for the improvement of VCO gain linearity, and the number of varactor biasing are minimized as two. VCO gain deterioration is also improved by using the varactor switching technique. The VCO gain and interval of VCO gain are maintained as low and improved using the VCO frequency calibration block. The sigma-delta modulator for fractional divider is designed by the co-simualtion method for accuracy and efficiency improvement. The VCO, PFD, CP and LF are verified by Cadence Spectre, and the sigma-delta modulator is simulated using Matlab Simulink, ModelSim and HSPICE. The power consumption of the frequency synthesizer is 18mW, and the VCO has 52.1% tuning range according to the VCO maximum output frequency. The VCO phase noise is lower than -100dBc/Hz at 1MHz at 1MHz offset for 1GHz, 1.5GHz, and 2GHz output frequencies.