• Journal of IKEEE
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• v.21 no.2
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• pp.130-135
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• 2017

Normally, in data transmission, extra parity bits are added to the input message which were derived from its input and a pre-defined algorithm. The same algorithm is used by the receiver to check the consistency of the delivered information, to determine if it is corrupted or not. It recovers and compares the received information, to provide matching and correcting the corrupted transmitted bits if there is any. This paper aims the following objectives: to use an alternative error detection-correction method, to lessens both the fixed number of the required redundancy bits 'r' in cyclic redundancy checking (CRC) because of the required polynomial generator and the overhead of interspersing the r in Hamming code. The experimental results were synthesized using Xilinx Virtex-5 FPGA and showed a significant increase in both the transmission rate and detection of random errors. Moreover, this proposal can be a better option for detecting and correcting errors.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.11
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• pp.63-72
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• 1997

The design and implementation of a drive wheel position, orientation, and velocity feedback control algorithm for a differential-drive mobile robot is described here. A new concept, the most significant error, is introduced as the control design objective. Drive wheel position, orientation, and velocity feedback control directly minimize the most siginificant error by coordinating the motion of the two drive wheels. The drive wheel position, orientation, and velocity feedback control algorithm is analyzed and experiments are conducted to evaluate its performance. The experimental results are shown that drive wheel position, orientation and velocity feedback control algorithm yields substantially smaller position and orientation errors than those of conventional methods.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.8
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• pp.1276-1282
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• 2002

In this paper, a high speed charging algorithm that charges Ni-Cd secondary pack battery within 40 minutes is implementation. Proposed algorithm is that suppling 4 stage pulse instead of constant voltage or current. That makes charge time short, temperature low, and extends battery life. Experimental results show that secondary pack battery is charged within 40 minutes and achieved life time about 2000 cycle.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.3
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• pp.11-22
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• 1997

This paper presents the design and implementation of an efficient algorithm for detecting untestable paths in multi-level circuits. Transforming multi-level circuit into a multiplexor-based one through BDD(binary decision diagram)construction, the proposed algorithm detects untestable paths in the transformed circuits. By constructing ENF (equivalent normal form) only for reconvergent paths, the proposed system detects and removes untestable paths efficiently in terms of the run-time and memory usage. Experimental results for MCNC/ISCAS benchmark circuits show that the system efficiently detects and removes untestable paths. The run-time and memory usage have been reduced by 37.7% and 60/9%, respectively, comapred to the previous methods.

• ETRI Journal
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• v.39 no.2
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• pp.255-263
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• 2017

This paper proposes a graph-theatrical approach to optimize spatial reuse by adopting a technique that quantizes the channel information into single bit sub-messages. First, we introduce an interference graph to model the network topology. Based on the interference graph, the computational requirements of the algorithm that computes the optimal spatial reuse factor of each user are reduced to quasilinear time complexity, ideal for practical implementation. We perform a resource allocation procedure that can maximize the efficiency of spatial reuse. The proposed spatial reuse scheme provides advantages in beamforming systems, where in the interference with neighbor nodes can be mitigated by using directional beams. Based on results of system level measurements performed to illustrate the physical interference from practical millimeter wave wireless links, we conclude that the potential of the proposed algorithm is both feasible and promising.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2001.04a
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• pp.217-222
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• 2001

In this paper, we have proposed a new approach to the design of robot vision system to develop the technology for the automatic test and assembling of precision mechanical and electronic parts for the factory automation. In order to perform real time implementation of the automatic assembling tasks in the complex processes, we have developed an intelligent control algorithm based-on neural networks control theory to enhance the precise motion control. Implementing of the automatic test tasks has been performed by the real-time vision algorithm based-on TMS320C31 DSPs. It distinguishes correctly the difference between the acceptable and unacceptable defective item through pattern recognition of parts by the developed vision algorithm. Finally, the performance of proposed robot vision system has been illustrated by experiment for the similar model of fifth cell among the twelve cell for automatic test and assembling in S company.

• Journal of applied mathematics & informatics
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• v.30 no.1_2
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• pp.101-109
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• 2012

In this paper, we present an algorithm for computing the number of points on the Jacobian varieties of one-dimensional family of genus 3 nonhyperelliptic curves over finite fields. We also provide the explicit formula of the characteristic polynomial of the Frobenius endomorphism of the Jacobian of $C:y^3=x^4+{\alpha}$ over a finite field $\mathbb{F}_p$ with $p{\equiv}1$ (mod 3) and $p{\neq}1$ (mod 4). Moreover, we give some implementation results using Gaudry-Schost method. A 162-bit order is computed in 97 s on a Pentium IV 2.13 GHz computer using our algorithm.

• Asia pacific journal of information systems
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• v.16 no.1
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• pp.127-144
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• 2006

The K-means algorithm is widely used at the initial stage of data analysis in data mining process, partly because of its low time complexity and the simplicity of practical implementation. Cluster validity indices are used along with the algorithm in order to determine the number of clusters as well as the clustering results of datasets. In this paper, we present a performance comparison of sixteen indices, which are selected from forty indices in literature, while considering their applicability to nonhierarchical clustering algorithms. Data sets used in the experiment are generated based on multivariate normal distribution. In particular, four error types including standardization, outlier generation, error perturbation, and noise dimension addition are considered in the comparison. Through the experiment the effects of varying number of points, attributes, and clusters on the performance are analyzed. The result of the simulation experiment shows that Calinski and Harabasz index performs the best through the all datasets and that Davis and Bouldin index becomes a strong competitor as the number of points increases in dataset.

• The Journal of the Acoustical Society of Korea
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• v.23 no.3E
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• pp.79-84
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• 2004

In this paper, the AEC(acoustic echo canceller) is designed and implemented using VHDL(VHSIC hardware description language). The designed Echo Canceller employs the pipeline and the master-slave structure, and is realized with FPGA. As an adaptive algorithm, the Normalized LMS algorithm is used. For the coefficient adjustment, the Stochastic Iteration Algorithm(SIA) which uses only current residual values is used and the number of registers are evidently reduced and convergence speed is also much improved comparing to existing methods by using EAB of FPGA for FIR filter structure of transceiver. The designed Echo Canceller is verified with the test board implemented for this paper. From the timing simulation echo signals at about 1500 sampling data are converged and ERLE is improved by about 42-dB.

• The Journal of Society for e-Business Studies
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• v.6 no.2
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• pp.159-166
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• 2001

EC(Electronic Commerce) is increasing with high speed based on the expansion of Internet. EC which is done through Internet has strong point like independence from time and space, On the contrary, it also has weak point like security problem because anybody can access easily to the system due to open network attribute of Internet. Therefore, we need the solutions that protect the security problem for safe and useful U activity, One of these solutions is the implementation of strong cipher algorithm. NPC(Non-Polynomial Complete) cipher algorithm proposed in this paper is good for the security and it overcome the limit of current 64bits cipher algorithm using 256bits key for input output and encryption key, Moreover, it is designed for the increase of calculation complexity and probability calculation by adapting more complex design for subkey generation regarded as one of important element effected to encryption.