Journal of the Korean Institute of Telematics and Electronics C (전자공학회논문지C)
- Volume 34C Issue 3
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- Pages.11-22
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- 1997
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- 1226-5853(pISSN)
Design of an efficient algorithm for the detection of untestable paths in multi-level circuits
다단 회로에서 테스트 불가능한 경로 검출을 위한 효율적인 알고리듬의 설계
- Heo, Hoon (CAD & Computer System Design) ;
- Hwang, Sun-Young (CAD & Computer System Design)
- Published : 1997.03.01
Abstract
This paper presents the design and implementation of an efficient algorithm for detecting untestable paths in multi-level circuits. Transforming multi-level circuit into a multiplexor-based one through BDD(binary decision diagram)construction, the proposed algorithm detects untestable paths in the transformed circuits. By constructing ENF (equivalent normal form) only for reconvergent paths, the proposed system detects and removes untestable paths efficiently in terms of the run-time and memory usage. Experimental results for MCNC/ISCAS benchmark circuits show that the system efficiently detects and removes untestable paths. The run-time and memory usage have been reduced by 37.7% and 60/9%, respectively, comapred to the previous methods.
Keywords