• Title/Summary/Keyword: implementation algorithm

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An Efficient Implementation of Key Frame Extraction and Sharing in Android for Wireless Video Sensor Network

  • Kim, Kang-Wook
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.9
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    • pp.3357-3376
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    • 2015
  • Wireless sensor network is an important research topic that has attracted a lot of attention in recent years. However, most of the interest has focused on wireless sensor network to gather scalar data such as temperature, humidity and vibration. Scalar data are insufficient for diverse applications such as video surveillance, target recognition and traffic monitoring. However, if we use camera sensors in wireless sensor network to collect video data which are vast in information, they can provide important visual information. Video sensor networks continue to gain interest due to their ability to collect video information for a wide range of applications in the past few years. However, how to efficiently store the massive data that reflect environmental state of different times in video sensor network and how to quickly search interested information from them are challenging issues in current research, especially when the sensor network environment is complicated. Therefore, in this paper, we propose a fast algorithm for extracting key frames from video and describe the design and implementation of key frame extraction and sharing in Android for wireless video sensor network.

Transition and Parsing State and Incrementality in Dynamic Syntax

  • Kobayashi, Masahiro;Yoshimoto, Kei
    • Proceedings of the Korean Society for Language and Information Conference
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    • 2007.11a
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    • pp.249-258
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    • 2007
  • This paper presents an implementation of a gramar of Dynamic Syntax for Japanese. Dynamic Syntax is a grammar formalism which enables a parser to process a sentence in an incremental fashion, establishing the semantic representation. Currently the application of lexical rules and transition rules in Dynamic Syntax is carried out arbitrarily and this leads to inefficient parsing. This paper provides an algorithm of rule application and partitioned parsing state for efficient parsing with special reference to processing Japanese, which is one of head-final languages. At the present stage the parser is still small but can parse scrambled sentences, relative clause constructions, and embedded clauses. The parser is written in Prolog and this paper shows that the parser can process null arguments in a complex sentence in Japanese.

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A Speed Sensorless Induction Motor Control System with Direct Torque Control system (직접 토크제어에 의한 속도검출기 없는 유도전동기 제어시스템)

  • Kim, Nam-Hun;Kim, Min-Ho;Kim, Min-Huei;Kim, Dong-Hee;Choi, Kyung-Ho
    • Proceedings of the KIEE Conference
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    • 2001.04a
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    • pp.281-284
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    • 2001
  • This paper presents implementation of digitally speed sensorless control system for induction motor with a direct torque control(DTC) using 32bit DSP TMS320C31. The system are closed loop stator flux and torque observer for wide speed range that inputs are currents and voltages sensing of motor terminal, MRAS with rotor flux linkages for the speed turning signal, two hysteresis controllers, optimal switching look-up table and IGBT voltage source inverter. There are suggested a control algorithm and system, and given simulation and implementation results on the 2.2Kw general purposed induction motor.

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Implementation of Active Noise Control with DSP56001 (DSP56001을 이용한 능동소음제어의 구현)

  • Kim, Young-Hoon;Park, Jang-Kwan;Koo, Choon-Keun;Chung, Chan-Soo
    • Proceedings of the KIEE Conference
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    • 1998.07b
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    • pp.654-656
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    • 1998
  • This paper deal with the implementation of Active Noise Control (ANC) in a short duct. In case of ANC in the air duct, input microphone, control speaker, error microphone are used. But we can't use input microphone because of the characteristics of short duct. It is difficult to avoid howl. So we propose single-channel adaptive feedback ANC which is composed only error microphone and control speaker without input microphone. FXLMS algorithm is used to compensate for the time delay of the error path. Experimental results show that the controller reduce noise signal sufficiently.

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Distributed Hybrid Genetic Algorithms for Structural Optimization (구조최적화를 위한 분산 복합 유전알고리즘)

  • 우병헌;박효선
    • Proceedings of the Computational Structural Engineering Institute Conference
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    • 2002.10a
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    • pp.203-210
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    • 2002
  • The great advantages on the Genetic Algorithms(GAs) are ease of implementation, and robustness in solving a wide variety of problems, several GAs based optimization models for solving complex structural problems were proposed. However, there are two major disadvantages in GAs. The first disadvantage, implementation of GAs-based optimization is computationally too expensive for practical use in the field of structural optimization, particularly for large-scale problems. The second problem is too difficult to find proper parameter for particular problem. Therefore, in this paper, a Distributed Hybrid Genetic Algorithms(DHGAs) is developed for structural optimization on a cluster of personal computers. The algorithm is applied to the minimum weight design of steel structures.

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Systolic arry archtecture for full-search mothion estimation (완전탐색에 의한 움직임 추정기 시스토릭 어레이 구조)

  • 백종섭;남승현;이문기
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.12
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    • pp.27-34
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    • 1994
  • Block matching motion estimation is the most widely used method for motion compensated coding of image sequences. Based on a two dimensional systolic array, VLSI architecture and implementation of the full search block matching algorithm are described in this paper. The proposed architecture improves conventional array architecture by designing efficient processing elements that can control the data prodeuced by efficient search window division method. The advantages are that 1) it allows serial input to reduce pin counts for efficient composition of local memories but performs parallel processing. 2) It is flexible and can adjust to dimensional changes of search windows with simple control logic. 3) It has no idel time during the operation. 4) It can operate in real/time for low and main level in MPEG-2 standard. 5) It has modular and regular structure and thus is sutiable for VLSI implementation.

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Hardware Implementation of fast ARIA cipher processor based on pipeline structure (파이프라인 구조 기반의 고속 ARIA 암호 프로세서의 하드웨어 구현)

  • Ha, Joon-Soo;Choi, Hyun-Jun;Seo, Young-Ho;Kim, Dong-Wook
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.629-630
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    • 2006
  • This paper presented a hardware implementation of ARIA, which is Korean standard block ciphering algorithm. In this work, we proposed a improved architecture based on pipeline structure and confirmed that the design operates in a clock frequency of 101.7MHz and in throughput of 957Mbps in Xilinx FPGA XCV-1600E.

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Implementation of Symbol Detector for 1Gbps MIMO MB-OFDM System (1Gbps급 MIMO MB-OFDM 시스템을 위한 효율적인 심볼 검출기 구현)

  • Im, Jun-Ha;Cho, Un-Sun;Kim, Jae-Seok
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.649-650
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    • 2006
  • An analysis is made of a new 1Gbps MB-OFDM system having same bandwidth and transmission power as conventional 480Mbps system. $2{\times}2$ MIMO scheme and MLD with soft decision demodulation algorithm are proposed in this paper. As a result of hardware implementation, it showed as same performance as conventional MB-OFDM system, while presenting doubled data rates and low complexity.

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Implementation of Acoustic Echo Canceller Using Robust PBFLMS in noises with ARM9EJ-S Core (ARM9EJ-S Core를 이용한 PBFLMS 음향 반향 제거기 구현)

  • Yang, Yong-Ho;Kim, Jong-Hak;Kim, Jeong-Joong;Lee, In-Sung
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.357-358
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    • 2006
  • We propose the robust PBFLMS in noises, which is the enhanced acoustic echo canceller using ACPBF-LMS(Alternative Constrained Partitioned Block Frequency domain Least Mean Square) algorithm. The defect of the block structure filtering is the deterioration of convergence efficiency from noise and interference. To improve the performance of convergence efficiency, noise effect should be reduced. The new method of reducing noise effect is proposed, which apply the estimated background noise to adaptive filter step size. By experiments, the proposed acoustic echo canceller has TCL of 50dB, and always provides faster convergence speed and lower complexity than the full-tap NLMS. We also carried out an implementation of PBFLMS using ARM9EJ-S.

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An Efficient Virtual Teeth Modeling for Dental Training System

  • Kim, Lae-Hyun;Park, Se-Hyung
    • International Journal of CAD/CAM
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    • v.8 no.1
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    • pp.41-44
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    • 2009
  • This paper describes an implementation of virtual teeth modeling for a haptic dental simulation. The system allows dental students to practice dental procedures with realistic tactual feelings. The system requires fast and stable haptic rendering and volume modeling techniques working on the virtual tooth. In our implementation, a volumetric implicit surface is used for intuitive shape modification without topological constraints and haptic rendering. The volumetric implicit surface is generated from input geometric model by using a closest point transformation algorithm. And for visual rendering, we apply an adaptive polygonization method to convert volumetric teeth model to geometric model. We improve our previous system using new octree design to save memory requirement while increase the performance and visual quality.