• ETRI Journal
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• v.35 no.5
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• pp.931-934
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• 2013

The weight calculation in an iterative algorithm is the most computationally costly task in computed tomography image reconstruction. In this letter, a fast algorithm to speed up the weight calculation is proposed. The classic square pixel rotation approximate calculation method for computing the weights in the iterative algorithm is first analyzed and then improved by replacing the square pixel model with a circular pixel model and the square rotation approximation with a segmentation method of a circular area. Software simulation and hardware implementation results show that our proposed scheme can not only improve the definition of the reconstructed image but also accelerate the reconstruction.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.600-607
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• 2004

The paper describes the implementation of the video conferencing system using public key infrastructure which is used for user authentication and media stream encryption. Using public key infrastructure, we are able to reinforce the authentication for conference participant and block several malicious hacking while protecting conference control information. The paper shows the implementation of the transportation layer secure protocol in conformity with Korea public key authentication algorithm standard and symmetric key encryption algorithm (RC2, SEED, DES and 3DES) for media stream encryption. The feature of the paper is transportation layer secure protocol that is implemented for protection of information on a user authentication and video conference and the media streaming encryption algorithm also can be envisioned with another block encryption algorithm. The key for media streaming encryption may be safely distributed by the transportation layer secure protocol.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.317-320
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• 2002

In this paper, we will present the design and implementation of the KASUMI crypto algorithm and confidentiality algorithm (f8) to an hardware chip for 3GPP system. The f8 algorithm is based on the KASUMI which is a block cipher that produces a 64-bit output from a 64-bit input under the control of a 128-bit key. Various architectures (low hardware complexity version and high performance version) of the KASUMI are made with a Xilinx FPGA and the characteristics such as hardware complexity and thor performance are analyzed.

• Journal of information and communication convergence engineering
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• v.12 no.4
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• pp.252-256
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• 2014

Traditional block cipher Advanced Encryption Standard (AES) is widely used in the field of network security, but it has high overhead on each operation. In the 15th international workshop on information security applications, a novel lightweight and low-power encryption algorithm named low-power encryption algorithm (LEA) was released. This algorithm has certain useful features for hardware and software implementations, that is, simple addition, rotation, exclusive-or (ARX) operations, non-Substitute-BOX architecture, and 32-bit word size. In this study, we further improve the LEA encryptions for cloud computing. The Web-based implementations include JavaScript and assembly codes. Unlike normal implementation, JavaScript does not support unsigned integer and rotation operations; therefore, we present several techniques for resolving this issue. Furthermore, the proposed method yields a speed-optimized result and shows high performance enhancements. Each implementation is tested using various Web browsers, such as Google Chrome, Internet Explorer, and Mozilla Firefox, and on various devices including personal computers and mobile devices. These results extend the use of LEA encryption to any circumstance.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.82-85
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• 1998

Because ATM was originally designed for the optical fiber environment with bit error rate(BER) of 10-11, it is difficult to maintain ATM cell extraction capability in wireless environment where BER ranges from 10-6 to 10-3. Therefore, it must be proposed the algorithm of ATM cell extraction in wereless environment. In this paper, the frame structure and synchronization algorithm satisfyling the above condition are explained, and the new ASIC implementation method of this algorithm is proposed. The known method using shift register needs so many gates that it is not suitable for ASIC implementation. But in the proposed method, a considerable reduction in gate count can be achieved by using random access memory.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.477-483
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• 2015

The k-Winners-Take-All (kWTA) is an operation to find the largest k (>1) inputs among N inputs. Parallel search algorithm of kWTA for digital inputs is not invented yet, so most of digital kWTA architectures have O(N) time complexity. A parallel search algorithm for digital kWTA operation and the circuits for its VLSI implementation are presented in this paper. The proposed kWTA architecture can compare all inputs simultaneously in parallel. The time complexity of the new architecture is O(logN), so that it is scalable to a large number of digital data. The high-speed kWTA operation and its O(logN) dependency of the new architecture are verified by simulations. It takes 290 ns in searching for 5 winners among 1024 of 32 bit data, which is more than thousands of times faster than existing digital kWTA circuits, as well as existing analog kWTA circuits.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.3
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• pp.217-226
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• 1986

A method on the hardware implementation of the Multi-channel FIR digital filter using Digital Quarter Square Multiplication(DQSM) algorithm is proposed. This paper describes that ROM requirement can be reduced by using the double precision algorithm and the absolute value circuit, and also execution speed can be improved by reducing logic level steps of absolute value circuit. The frequency response of the four channel FIR digital filter implemented by the above method is quite agreeable with the frequency response simulated by Remez excahange algorithm.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.6
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• pp.94-104
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• 1984

Based on a new concept of connection index of a weighted graph, a new efficient houris tic algorithm of 0(v.e) for network partitioning is presented, where v and e are the number of nodes and edges, respectively. Experimental results show that our algorithm is very efficient and yields an optimal or near optimal solution for a number of partitioning problems tested. Some applications of the proposed algorithm are suggested and its computer implementation is described in detail.

• Journal of the Korea Institute of Military Science and Technology
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• v.8 no.4 s.23
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• pp.24-31
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• 2005

This paper presents an implementation of a real-time multi-sensor data fusion algorithm for Flight Test Computer. The sensor data consist of positional information of the target from a radar, a GPS receiver and an INS. The data fusion algorithm is designed by the 21st order distributed Kalman Filter which is based on the PVA model with sensor bias states. A fault detection and correction logics are included in the algorithm for bad measurements and sensor faults. The statistical parameters for the states are obtained from Monte Carlo simulations and covariance analysis using test tracking data. The designed filter is verified by using real data both in post processing and real-time processing.

• Journal of applied mathematics & informatics
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• v.24 no.1_2
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• pp.81-94
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• 2007

In this paper we investigate symbolic implementation of two modifications of the Leverrier-Faddeev algorithm, which are applicable in computation of the Moore-Penrose and the Drazin inverse of rational matrices. We introduce an algorithm for computation of the Drazin inverse of rational matrices. This algorithm represents an extension of the papers [11] and [14]. and a continuation of the papers [15, 16]. The symbolic implementation of these algorithms in the package MATHEMATICA is developed. A few matrix equations are solved by means of the Drazin inverse and the Moore-Penrose inverse of rational matrices.