Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Hardware Implementation of the 3GPP KASUMI crypto algorithm

  • Kim, Ho-Won (Department of Information Security Basic, Electronics and Telecommunications Research Institute(ETRI)) ;
  • Park, Yong-Je (Department of Information Security Basic, Electronics and Telecommunications Research Institute(ETRI)) ;
  • Kim, Moo-Seop (Department of Information Security Basic, Electronics and Telecommunications Research Institute(ETRI)) ;
  • Ryu, Hui-Su (Department of Information Security Basic, Electronics and Telecommunications Research Institute(ETRI))
  • Published : 2002.07.01
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Abstract

In this paper, we will present the design and implementation of the KASUMI crypto algorithm and confidentiality algorithm (f8) to an hardware chip for 3GPP system. The f8 algorithm is based on the KASUMI which is a block cipher that produces a 64-bit output from a 64-bit input under the control of a 128-bit key. Various architectures (low hardware complexity version and high performance version) of the KASUMI are made with a Xilinx FPGA and the characteristics such as hardware complexity and thor performance are analyzed.

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