• Title/Summary/Keyword: image scaler

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Weighted DCT-IF for Image up Scaling

  • Lee, Jae-Yung;Yoon, Sung-Jun;Kim, Jae-Gon;Han, Jong-Ki
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.2
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    • pp.790-809
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    • 2019
  • The design of an efficient scaler to enhance the edge data is one of the most important issues in video signal applications, because the perceptual quality of the processed image is sensitively affected by the degradation of edge data. Various conventional scaling schemes have been proposed to enhance the edge data. In this paper, we propose an efficient scaling algorithm for this purpose. The proposed method is based on the discrete cosine transform-based interpolation filter (DCT-IF) because it outperforms other scaling algorithms in various configurations. The proposed DCT-IF incorporates weighting parameters that are optimized for training data. Simulation results show that the quality of the resized image produced by the proposed DCT-IF is much higher than that of those produced by the conventional schemes, although the proposed DCT-IF is more complex than other conventional scaling algorithms.

Parallel Processing for Scaler SoC Implementation (Scaler SoC 구현을 위한 병렬처리 기술)

  • Moon, Ji-hye;Jeong, Yeon-Kyeong;Han, Jong-Ki
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2013.11a
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    • pp.143-146
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    • 2013
  • 멀티미디어 시대에 있어 이미지 신호처리(Image Signal Processing, ISP) 기술의 중요성이 거듭 강조되고 있는 가운데, 디지털 신호의 해상도를 변경하기 위해 여러 가지 커널을 사용하여 영상을 scaling 하는 방법들이 제안되고 있다. 본 논문에서 는 cubic convolution scaler를 이용하여 영상을 확대 및 축소할 때 하드웨어 관점에서의 메모리 최적화를 주제로 다룬다. SoC 상에서는 라인 메모리 개념을 가지기 때문에 영상의 해상도를 변환할 때 많은 메모리를 사용하게 된다. 또한 scaling을 할 때 곱하기 연산이 들어가게 되면 그에 비례하여 복잡도와 그에 따른 비용이 증가하게 된다. 이에 메모리와 process단계를 최적화하는 방법을 제안한다.

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Optimized Image Downscaler Using Non-linear Digital Filter (비선형 디지털 필터를 이용한 최적화된 영상 축소기)

  • Lee, Bonggeun;Lee, Honam;Lee, Youngho;Bongsoon Kang
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.177-180
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    • 2000
  • This paper proposes the optimized hardware architecture for a high performance image downscaler The proposed downscaler uses non-linear digital filters for horizontal and vertical scalings. In order to achieve the optimization, the filters are implemented with multiplexer-adder type scheme and all the filter coefficients are selected on the order of two's power. The performance of the scaler is also verified by comparing with a pixel drop downscaler. The proposed scaler is designed by using the VHDL and implemented by using the IDEC-C632 0.65$\mu\textrm{m}$ cell library.

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AMBA-based LCD controller design and implementation (AMBA기반의 LCD 컨트롤러 설계)

  • Hong Jae-In;Cho Tae-Kyung
    • The Journal of the Korea Contents Association
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    • v.4 no.4
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    • pp.179-187
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    • 2004
  • In this paper, we have designed an LCD controller based on AMBA. Normally display systems using the LCD are adopted independent bus architecture for high speed data access. Proposed LCD controller complies with AMBA data format and has an image scaler that executes interpolation for full screen display. This image scaler employs FOI for horizontal scaling and H-Shape pseudomedian filter for vertical scaling. It has been designed with VHDL and verified on prototype board using Xilinx FPGA and LCD panel.

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System Development and IC Implementation of High-performance Image Downscaler using Phase-correction Digital Filters (위상 교정 디지털 필터를 이용한 고성능/고화질 이미지 축소기 시스템 개발 및 IC 구현)

  • Lee, Y.;O. Moon;Lee, H.;Lee, B.;B. Kang;C. Hong
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.08a
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    • pp.265-268
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    • 2000
  • In this paper, we propose an algorithm, an optimized architecture, and an implementation for an improved performance of image downscaler. The proposed downscaler uses two-dimensional digital filters for horizontal and vertical scalings, respectively. It also improves scaling precisions and decreases the loss of data, compared with the 1/32 scaler 〔1〕. In order to achieve the optimization, the digital filters are implemented by the multiplexer -adder type scheme 〔2〕. The scaler is designed by using the Verilog-HDL. It is synthesized into gates by using the Samsung 0.35 um STD90 TLM library.

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Image Resolution Reduction Algorithm of Arbitrary Rate and Its Hardware Architecture (임의의 비율을 지원하는 영상 축소 알고리즘과 하드웨어 구조)

  • Park, Hyun-Sang
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.11
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    • pp.3094-3097
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    • 2009
  • The use of general-purpose divider is inevitable to implement a image down-scaler when an arbitrary scaling ratio is given. To get an output at every clock from the divider, the divider should be implemented by LUT, however, its hardware size will be bigger and bigger as the precision level is increased. In this paper, a new image scaling algorithm is presented for a arbitrary scaling ratio, which do not requires a general-purpose or LUT-based divider. The proposed algorithm utilizes only comparators and adders such that the hardware size can be reduced by 1/10 compared to the conventional approaches.

Development of a Vision Based Machine Tool Presetter (영상 기반 머신툴 프리세터 개발)

  • Jung, Ha-Hyoung;Kim, Tae-Tean;Park, Jin-Ha;Lyou, Joon
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.3
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    • pp.49-56
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    • 2014
  • Generally, the tool presetter is utilized to align and measure some specific dimensions of a machine tool. It is classified into two types(contact and contactless) according to the measurement method, and the optical sensor based contactless scheme has the advantages of measurement flexibility and convenience. This paper describes the design and realization of an industrial tool presetter using machine vision and linear scaler. Before measurement, the objective tool is attached to the mechanical mount and is aligned with the optical apparatus. After capturing tool images, the suggested image processing algorithm calculates its dimesions accurately, combining the traversing distance from the linear scaler. Experimental results conforms that the present tool presetter system has the precision within ${\pm}20um$ error.

Implementation of a Modified Cubic Convolution Scaler for Low Computational Complexity (저연산을 위한 수정된 3차 회선 스케일러 구현)

  • Jun, Young-Hyun;Yun, Jong-Ho;Park, Jin-Sung;Choi, Myung-Ryul
    • Journal of Korea Multimedia Society
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    • v.10 no.7
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    • pp.838-845
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    • 2007
  • In this paper, we propose a modified cubic convolution scaler for the enlargement or reduction of digital images. The proposed method has less computational complexity than the cubic convolution method. In order to reduce the computational complexity, we use the linear function of the cubic convolution and the difference value of adjacent pixels for selecting interpolation methods. We employ adders and barrel shifts to calculate weights of the proposed method. The proposed method is compared with the conventional one for the computational complexity and the image quality. It has been designed and verified by HDL(Hardware Description Language), and synthesized using Xilinx Virtex FPGA.

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A control system of each product with a remote controller for Multi-vision which is composed of several products (Multi-Vision으로 구성된 제품들의 리모컨을 통한 개별 제어 시스템)

  • Bae, Sang-Ho;Kim, Young-Kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.149-152
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    • 2011
  • A Multi-Vision needs an image adjust of each product to make the same picture quality for all products when it's installed. Owing to this reason need individual control. This document request indivisual control method for each product with the Remote controller. To realize this method need make Set ID and Picture ID on the UI and need daisy chain of cable to connect Remocon code(IR Signal) In to Out, After allocation the Set ID for each product. Picture ID of the product which want to change picture quality make equal to Set ID. And the product which is same Set ID and Picture ID is only controlled through decoding of Remocon code to Scaler.

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Enhanced Vein Detection Method by Using Image Scaler Based on Poly Phase Filter (Poly Phase Filter 기반의 영상 스케일러를 이용한 개선 된 정맥 영역 추출 방법)

  • Kim, HeeKyung;Lee, Seungmin;Kang, Bongsoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.5
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    • pp.734-739
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    • 2018
  • Fingerprint recognition and iris recognition, which are one of the biometric methods, are easily influenced by external factors such as sunlight. Recently, finger vein recognition is used as a method utilizing internal features. However, for accurate finger vein recognition, it is important to clearly separate vein and background regions. However, it is difficult to separate the vein region and background region due to the abnormalized illumination, and a method of separating the vein region and the background region after normalized the illumination of the input image has been proposed. In this paper, we proposed a method to enhance the quality improvement and improve the processing time compared to the existing finger vein recognition system binarization and labeling method of the image including the image stretching process based on the existing illumination normalization method.