• ETRI Journal
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• 제28권5호
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• pp.555-560
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• 2006

A PIN photodiode having a low dark current of 1.35 nA and a high external quantum efficiency of 95.3% fabricated for a passive optical network receiver. As the current was increased under a high voltage of 38 V and a temperature of $190^{\circ}C$, it was observed that there is a threshold current at 11 mA which induces a junction failure. Experimental data suggest that the junction failure occurs due to the crystal breaking at the end facet as a result of thermal heat or energetic carriers. This threshold behavior of junction failure is a valuable observation for the safe treatment of photodiodes. As long as the current is limited below the threshold currents, we have not observed failure events of our photodiodes.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1402-1404
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• 2001

Josephson junction arrays of the type $Nb/Al-Al_2O_3/Nb$ were prepared by DC magnetron sputtering. The tunnel barrier was formed by in-situ thermal oxidation. Individual junctions were defined using selective niobium etching process(SNEP). The characteristic curves of Josephson junction arrays fabricated with and without cooling the substrate were represented. The junctions deposited without cooling showed poor characteristics(high leakage current, low gap voltage), and a high quality Josephson junction array of 2,000 junctions with high hysteresis was obtained with cooling and when operated at 74.6 GHz, it generated stable quantized voltage steps up to 2.2 V.

• 한국인터넷방송통신학회논문지
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• 제13권2호
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• pp.41-46
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• 2013

본 논문에서는 코르게이트 도파관을 사용한 위성통신용 저역통과 여파기를 제안하였다. 본 구조는 위성통신용 시스템으로 사용되기 위해 임피던스 트랜스포머와 T-junction을 배열한 코르게이트 도파관이 결합된 형태로 설계하였다. T-junction은 낮은 삽입손실과 높은 격리도의 특성을 만족시키기 위해 Chebyshev 함수를 사용하여 설계하였다. 임피던스 트랜스포머는 높은 반사손실을 위해 코르게이트 도파관의 양 끝에 높이가 다른 T-junction을 결합한 구조로 설계하였다. 제작된 여파기는 12.25 ~ 12.75 GHz에서는 반사손실이 35.4 dB이상, 삽입손실은 0.1 dB이하, 14.0 ~ 14.5 GHz에서는 격리도가 54.4 dB이상으로 나타났다. 따라서 본 논문에서 제안된 저역통과 여파기는 위성통신용 시스템에 사용 가능함을 보였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.257.2-257.2
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• 2015

In this paper, we report on the 10.33% efficient thin film/bulk tandem solar cells with the top cell made of amorphous silicon thin film and p-type bulk crystalline silicon bottom cell. The tunneling junction layers were used the doped nanocrystalline Si layers. It has to allow an ohmic and low resistive connection. For player and n-layer, crystalline volume fraction is ~86%, ~88% and dark conductivity is $3.28{\times}10-2S/cm$, $3.03{\times}10-1S/cm$, respectively. Optimization of the tunneling junction results in fill factor of 66.16 % and open circuit voltage of 1.39 V. The open circuit voltage was closed to the sum of those of the sub-cells. This tandem structure could enable the effective development of a new concept of high-efficiency and low cost cells.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제55권2호
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• pp.72-75
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• 2006

A CMOS compatible Super Junction LDMOS (SJ-LDMOS) structure, which reduces substrate-assisted depletion effects, is reported. The proposed structure uses a N-buffer layer between the pillars and P-substrate to achieve global charge balance between the pillars, the N-buffer layer and the P-substrate. The new structure features high breakdown voltage, low on-resistance, and reduced sensitivity to doping imbalance in the pillars.

• Progress in Superconductivity
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• 제3권1호
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• pp.74-77
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• 2001

We have fabricated a high-Tc superconductive transistor with polyvinylidene fluoride (PVDF) gate electrode on MgO bicrystal Josephson junction by spin-coating method. The PVDF ferroelectric film is found to be suitable fur a gate electrode of the superconductive transistor since it has not only small leakage current but also high dieletric constant at low temperature. For the application of superconducting-FET, we investigated millimeter wave properties (60 GHz band) of the Josephson junction with PVDF gate electrode.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.322.1-322.1
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• 2014

Many research groups have studied tandem or multi-junction cells to overcome this low efficiency and degradation. In multi-junction cells, band-gap engineering of each absorb layer is needed to absorb the light at various wavelengths efficiently. Various absorption layers can be formed using multi-junctions, such as hydrogenated amorphous silicon carbide (a-SiC:H), amorphous silicon germanium (a-SiGe:H) and microcrystalline silicon (${\mu}c$-Si:H), etc. Among them, ${\mu}c$-Si:H is the bottom absorber material because it has a low band-gap and does not exhibit light-induced degradation like amorphous silicon. Nevertheless, ${\mu}c$-Si:H requires a much thicker material (>2 mm) to absorb sufficient light due to its smaller light absorption coefficient, highlighting the need for a high growth rate for productivity. ${\mu}c$-SiGe:H has a much higher absorption coefficient than ${\mu}c$-Si:H at the low energy wavelength, meaning that the thickness of the absorption layer can be decreased to less than half that of ${\mu}c$-Si:H. ${\mu}c$-SiGe:H films were prepared using 40 MHz very high frequency PECVD method at 1 Torr. SiH4 and GeH4 were used as a reactive gas and H2 was used as a dilution gas. In this study, the ${\mu}c$-SiGe:H layer for triple solar cells applications was performed to optimize the film properties.

• Journal of electromagnetic engineering and science
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• 제5권1호
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• pp.8-13
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• 2005

The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.

• 한국전기전자재료학회논문지
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• 제26권8호
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• pp.587-590
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• 2013

Release competition and development of eco-friendly vehicles have been conducted violently also automaker, it will be a high growth industry of the charger and battery, which is the driving source of the motor of an electric vehicle. Reduces the on-resistance power elements DC - DC converter for battery charger for electric vehicles, must minimize switching losses. Should have a low on-resistance power than existing products. Compare the Super Junction MOSFET and Planar MOSFET, As a result, super junction MOSFET improve on about 87.4% on-state voltage drop performance than planar MOSFET.

• 한국초전도ㆍ저온공학회논문지
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• 제23권2호
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• pp.6-9
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• 2021

단결정의 덩어리 시료로부터 박리된 NbSe₂와 FeSe 박막을 이용한 동종 초전도 vdW 접합을 만들고 저온전도측정을 통해 JJ 효과를 확인하였다. 각 물질의 초전도 틈을 측정하였으며 기존 결과와 잘 일치하는 것을 확인하였다. FeSe 접합의 경우 NbSe₂ 접합과 다르게 JJ가 구현되지 않는 경우가 다수 발생하는데 이는 NbSe₂와 구분되는 FeSe의 특성때문으로 보이며 일관성있는 JJ 구현을 위해서 저온 접합이나 접합 각도 의존성을 통한 향후 연구가 필요하다. 그럼에도 불구하고, 본 연구 결과는 FeSe 2차원 결정을 이용해 JJ가 잘 구현될 수 있음을 실험적으로 보인 첫 사례로서 그 의의를 갖는다.