• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.330-333
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• 2002

The stability against DC accelerated aging stress of $Dy_{2}O_{3}-doped$ $ZnO-Pr_{6}O_{11}-based$ varistor ceramics was investigated. The calculated nonlinear exponent$(\alpha)$ in varistor ceramics without $Dy_{2}O_{3}$ was only 4.9, whereas the $\alpha$ value of the varistors with $Dy_{2}O_{3}$ was abruptly increased in the range of 48.8 to 58.6. The varistor ceramics with $Dy_{2}O_{3}$ content of 1.0 mol% exhibited maximum ${\alpha}$, reaching 58.6, whereas they exhibited very poor stability. While, The varistor ceramics doped with 0.5 mol% $Dy_{2}O_{3}$ exhibited not only the high nonlinearity, which the ${\alpha}$ is 55.3 and the leakage current is $0.1{\mu}A$， but also the highest stability, which the variation rates of varistor voltage and nonlinear exponent are -0.8% and -14.3%, respectively, under DC accelerated aging stress, $0.95 V_{1mA}/150^{\circ}C/24h$.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.1
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• pp.86-93
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• 2003

This paper describes that the resonant tank type DC-DC converter consist of reactor and capacitor resonant tank circuit for increased the output current. This circuit configuration is composed of the resonant tank circuit used resonant capacitor and reactor and the capacitor connected in switch are a common using by resonance capacitor and ZVS(Zero Voltage Switching) capacitor. Therefore, the proposed converter can reduce a switching losses, noise, and voltage stress at turn-on and turn-on and has an advantage which is able to operating safely in load short, because DC reactor is connected with resonance reactor in order to supply a fixed current with low ripple from DC power supply. The analysis of proposed circuit uses normalized parameters and characteristic estimation is generally described the proposed circuit with the characteristics of power and output voltage etc. Also, design is based on the characteristic estmations in each step. Hence, We conform a rightfulness theoretical analysis by comparing a theoretical values and experimental values obtained from experiment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.685-688
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• 2005

An efficient sustain driver and a useful reset circuit composition technique are proposed for plasma display panel drive. The proposed sustain driver uses a series resonance between an external inductor and a panel to recover the energy dissipated by a capacitive displacement current of PDP. It consists of four switching devices, an inductor, and external capacitors, which supply sustain voltage sources. Although the amplitude of an input voltage source is twice as high as that of conventional sustain drivers, average voltage stress imposed on power switching devices is nearly same in their values. Moreover, the input voltage source can be directly applied for the use of a reset voltage source. Owing to this scheme, the proposed sustain driver and the embedded reset circuit have a simple configuration. The operational principle and design example are given with theoretical analyses. The validity of the proposed drive system is verified through experiments using a prototype equipped with a 7.5-inch-diagonal AC plasma display panel.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.1
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• pp.30-40
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• 2002

This paper studies the electronic ballast development for 250w MH lamps. We have improved the input power factor using a PFC IC. To provide the rating voltage required In the lamps, we have used the buck type dc-dc converter By this method, the stress of switching devices in inverter can be reduced. The inverter is the Full-Bridge type. To eliminate the acoustic resonance phenomena of MH lamps, we have added the high frequency sinewave voltage to the low frequency square-wave voltage to the lamp. We hove developed the igniter circuit using the L, C devices. We could control dimming of the lamp by varying the output voltage of the buck converter. The time of illuminating lamps and luminous intensity could be adjusted by season and time band. The buck converter output voltage can be controlled and the no load and over current situation were Protected by the development of the microprocessor Program.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.340-341
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• 2012

In this work, we investigated the effects of temperature stress on flatband voltage (VFB) shifts of HfO2-SiO2 double gate dielectrics devices. Fig. 1 shows a high frequency C-V of the device when a positive bias for 10 min and a subsequent negative bias for 10 min were applied at room temperature (300 K). Fig. 2 shows the corresponding plot when the same positive and negative biases were applied at a higher temperature (473.15 K). These measurements are based on the BTS (bias temperature stress) about mobile charge in the gate oxides. These results indicate that the positive bias stress makes no difference, whereas the negative bias stress produces a significant difference; that is, the VFB value increased from ${\Delta}0.51$ V (300 K, Fig. 1) to ${\Delta}14.45$ V (473.15 K, Fig. 2). To explain these differences, we propose a mechanism on the basis of oxygen vacancy in HfO2. It is well-known that the oxygen vacancy in the p-type MOS-Cap is located within 1 eV below the bottom of the HfO2 conduction band (Fig. 3). In addition, this oxygen vacancy can easily trap the electron. When heated at 473.15 K, the electron is excited to a higher energy level from the original level (Fig. 4). As a result, the electron has sufficient energy to readily cross over the oxide barrier. The probability of trap about oxygen vacancy becomes very higher at 473.15 K, and therefore the VFB shift value becomes considerably larger.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.1A
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• pp.80-86
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• 2010

This work has been measured and analyzed the device degradation of NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOS transistors of gate channel length 0.13 [${\mu}m$]. From the relation between the variation of threshold voltage and subthreshold slop by NBTI stress, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. As a results, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress parameters of nanoscale CMOS communication circuit design.

• Journal of Ginseng Research
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• v.24 no.1
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• pp.18-22
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• 2000

In previous reports we have shown that ginsenosides inhibit high threshold voltage-dependent $Ca^{2+}$ channels in neuronal cells. However, these studies did not show whether ginsenosides-induced inhibition of $Ca^{2+}$ currents discriminates among the various $Ca^{2+}$ channel subtypes, although it is known that there are at least five different $Ca^{2+}$ channel subtypes in neuronal cells. In this study we investigated the effect of ginsenosides on high threshold voltage-dependent $Ca^{2+}$ channel subtypes using their selective $Ca^{2+}$ channel blockers nimodipine (L-type), $\omega$-conotoxin GVIA (N-type), or $\omega$-agatoxin IVA (P-type) in bovine chromaffin cells. We could observe that ginsenosides inhibited high threshold voltage-dependent $Ca^{2+}$ currents in a dose-dependent manner. The $IC_{50}$/ was about 120 $\mu$g/ml. Nimodipine had no effect on ginsenosides response. However, the effect of ginsenosides on $Ca^{2+}$ currents was reduced by $\omega$-conotoxin GVIA, $\omega$-agatoxin IVA, and mixture of nimodipine, $\omega$-contoxin GVIA, and $\omega$-agatoxin IVA. These data suggest that ginsenosides are negatively coupled to three types of calcium channels in bovine chromaffin cell, including an $\omega$-conotoxin GVIA-sensitive (N-type) channel, an $\omega$-agatoxin IVA-sensitive (P-type) channel and nimodipine/$\omega$-conotoxin GVIA/$\omega$-agatoxin IVA-resistant (presumptive Q-type) channel.Q-type) channel.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.495-502
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• 2014

Fast recovery diodes (FRDs) were developed using the $p^{{+}{+}}/n^-/n^{{+}{+}}$ epitaxial layers grown by low temperature epitaxy technology. We investigated the effect of electrostatic discharge (ESD) stresses on their electrical and switching properties using current-voltage (I-V) and reverse recovery time analyses. The FRDs presented a high breakdown voltage, >450 V, and a low reverse leakage current, < $10^{-9}$ A. From the temperature dependence of thermal activation energy, the reverse leakage current was dominated by thermal generation-recombination and diffusion, respectively, at low and high temperature regions. By virtue of the abrupt junction and the Pt drive-in for the controlling of carrier lifetime, the soft reverse recovery behavior could be obtained along with a well-controlled reverse recovery time of 21.12 ns. The FRDs exhibited excellent ESD robustness with negligible degradations in the I-V and the reverse recovery characteristics up to ${\pm}5.5$ kV of HBM and ${\pm}3.5$ kV of IEC61000-4-2 shocks. Likewise, transmission line pulse (TLP) analysis reveals that the FRDs can handle the maximum peak pulse current, $I_{pp,max}$, up to 30 A in the forward mode and down to - 24 A in the reverse mode. The robust ESD property can improve the long term reliability of various power applications such as automobile and switching mode power supply.

• The Journal of the Korea Contents Association
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• v.21 no.6
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• pp.44-50
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• 2021

In this paper, we analyze the efficiency of light sources of CCFL and LED monitors. Cold Cathode Fluorescent Lamp (CCFL), which is widely used as a light source for LCD display, supplies a high voltage of 1,200[V] or more when it is initially driven. In addition, a constant normal voltage of 400 ~ 800[V] after lighting, and 3 ~ 6[ mA] is needed for a power circuit that can stabilize the current. Applying a high voltage causes a lot of stress on the inverter and generates a lot of heat in the cold cathode lamp, causing significant damage to the BLU (Back Light Unit), resulting in a burning phenomenon, which causes the screen to output normal colors when outputting the screen. We can not see the yellow output and the screen darkened. Therefore, in order to prevent such a symptom in advance, efficiency can be increased by using a Light Emitting Diode (LED) as the light source of the LCD display instead of a cold cathode fluorescent lamp (CCFL). As a result, it is shown that the LED method outperforms the CCFL method.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.166-173
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• 2009

The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.