• Journal of the Korean Graphic Arts Communication Society
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• v.29 no.3
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• pp.65-76
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• 2011

This research attempts to analyze communication effect of book-trailer as the promotion tool for book from various genre. For this research, existing book-trailers were classified into five types and prospective readers were selected as respondents for this research. Letter explanation type, Interview, cinematic production, stills and straplines, and animation were major type of book-trailer. Findings are 1) communication effect are different according to the type of book-trailers; 2) cinematic production and animation are the most effective type of book-trailers; 3) for memory and confirmation(sharing), a)stills and straplines, interview type, b) cinematic production and animation are founded as similar groups creating communication effect. Result of this research proposed the direction of production and practical use of book-trailer by scientific basis for publication marketer and book-trailer producer. ANOVA was used for analysis of hypothesis; measuring communication effect according to the type of book-trailer and sexuality.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.26 no.6
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• pp.1361-1373
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• 2016

Recently the need for user authentication with increasing, there are a variety of mechanisms, such as password, graphic authentication, token, biometrics and multiple authentication. in particular, the data of the 2-dimensional(2D) factors such as password, graphic authentication, biometrics is used because of the convenience. The stored information is problematic in that additional data recording needs to be performed whenever authentication data is updated. Furthermore, this storage method is problematic in that the time it takes to perform authentication increases because the time it takes to compare storage data with authentication data increases in proportion to an increase in the amount of the storage data. Accordingly, authentication through the rapid comparison of storage data with authentication data is a very important factor in data recording and authentication technology using memory. Using the three-dimensional(3D) optical memory by variously changing the recoding elements during recoding of data constitutes the way that multiple recoding different data storage. This enables high-density recoding in this way, and by applying the possible parallel processing at the time of recording and restoring method, provided that it is possible to quickly record and restore the data. In addition, each time to solve problems that require additional data recorded by a combination of the stored data record in the old data using a combination of the authentication. The proposed mechanism is proposed an authentication method using scheme after the recoding data in 3D optical memory to apply the conditions corresponding to the recoding condition when restoring the recorded data and through the experiment it was confirmed possible application as an authentication mechanism.

• Journal of Korea Multimedia Society
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• v.3 no.5
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• pp.526-534
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• 2000

There have been many researches on the 3D graphic accelerator for high speed by needs of CAD/CAM,3D modeling, virtual reality or medical image. In this paper, an SIMD processor architecture for 3D graphic accelerator is proposed in order to improve the processing time of the 3D graphics, and a parallel Phong shading algorithm is presented to estimate performance of the proposed architecture. The proposed SIMD processor architecture for 3D graphic accelerator consists of PCI local bus interface, 16 Processing Elements (PE's), and Park's multi-access memory system (NAMS) that has 17 memory modules. A serial algorithm for Phong shading is modified for the architecture and the main key is to divide a polygon into $4\times{4}$ squares. And, for processing a square, 4 PE's are regarded as a PE Grou logically. Since MAMS can support block access type with interval 1, it is possible that 4 PE Groups process a square at a time. In consequence, 16 pixels are processed simultaneously. The proposed SIMD processor architecture is simulated by CADENCE Verilog-XL that is a package for the hardware simulation. With the same simulated results as that of the serial algorithm, the speed enhancement by the parallel algorithm to the serial one is 5.68.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.5
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• pp.32-37
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• 1982

This paper shows a design method of English/Hanguel/Chinese display controller using address conversion thchnique and DMA in the raster scanning graphic CRT display by giving a design example (64 characters$\times$16 lines display controller).

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1275-1278
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• 2006

A display panel image data manipulator for SOP or SOG is presented. It is capable of all the shift operations for MPEG decoders, graphic processors and controllers as well as data pack, merging, bit split and reformation operations to improve speed and memory utilization. To alleviate poly-Si low yield, redundancy based fault recovery scheme is introduced utilizing regular structure.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.108-116
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• 1996

A semiconductor process imulator operated in windows$^{TM}$ environment has been developed. two-dimensional process simulation in personal computer has been enabled due to the improvement of CPU speed and the efficient use of memory. The process simulator in this paper is capable of calculating diffusion, oxidation, ion implantation, etching and deposition in two-dimensional manner. In addition, graphic-user-friendly editor, parser, and multi-dimensional graphical routine is also available in the devloped simulator.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1992.10a
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• pp.335-338
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• 1992

To purpose of this study is to design and manufacturing of packing gland using CAD/CAM system. The computer system used in this study was constructed with CPU 80386, RAM memory 4M, VGA graphic card. We was composed with CAD/CAM system, with interface PC and NC milling machine. By using develop program, we designed packing gland and it's manufactured. The basic structure of automatic production system for packing gland was established.

• Journal of the Korean Society of Safety
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• v.10 no.3
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• pp.42-46
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• 1995

To purpose of this study is to model design and motion analysis of tangential cam mechanism using personal computer system. The CAD(Computer Aided Design) system used in this study was constructed with CPU(Central Processing Unit) 80486, RAM(Random Access Memory) 8M, CGA graphic card. By using developed program for tangential cam mechanism, we designed tangential cam models and analysed displacement, velocity, acceleration of follower.

• The Journal of the Acoustical Society of Korea
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• v.20 no.1E
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• pp.14-19
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• 2001

We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell installed in an Merged Memory with Logic(MML). It generates the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. It is possible to test the embedded SDRAM without external test pin. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by 0.25μm cell library and is verified by Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14n algorithm.

• Korean Journal of Computational Design and Engineering
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• v.19 no.3
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• pp.294-304
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• 2014

This paper presents a real-time rendering algorithm of large-scale geometric data using GLSL (OpenGL shading language). It details the VAO (vertex array object) and VBO(vertex buffer object) to be used for up-loading the large-scale point clouds and polygon meshes to a graphic video memory, and describes the shader program composed by a vertex shader and a fragment shader, which manipulates those large-scale data to be rendered by GPU. In addition, we explain the global rendering procedure that creates and runs the shader program with the VAO and VBO. Finally, a rendering performance will be measured with application examples, from which it will be demonstrated that the proposed algorithm enables a real-time rendering of large amount of geometric data, almost impossible to carry out by previous techniques.