• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.6
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• pp.462-465
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• 2009

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method, The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than 10), Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.29-35
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• 2004

Hafnium-oxide gate dielectric films deposited by a metal organic chemical vapor deposition technique on a $N_2-plasma$ treated SiNx and a hydrogen-terminated Si substrate have been investigated. In the case of $HfO_2$ film deposited on a hydrogen-terminated Si substrate, suppressed crystallization with effective carbon impurity reduction was obtained at $450^{\circ}C$. X-ray photoelectron spectroscopy indicated that the interface layer was Hf-silicate rather than phase separated Hf-silicide and silicon oxide structure. Capacitance-voltage measurements show equivalent oxide thickness of about 2.6nm for a 5.0 nm $HfO_2/Si$ single layer capacitor and of about 2.7 nm for a 5.7 nm $HfO_2/SiNx/Si$ stack capacitor. TEM shows that the interface of the stack capacitor is stable up to $900^{\circ}C$ for 30 sec.

• Korean Journal of Materials Research
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• v.8 no.6
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• pp.499-504
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• 1998

For the formation of cobalt polycide gate electrode, CoSi, was grown on columnar poly-Si, granular poly-Si or amorphous Si by depositing either Co monolayer or Co/Ti bilayer and its thermal stability was compared to study effects of the substrate crystallinity and the silicide formation method. When specimens were rapidly heat-treated at 90$0^{\circ}C$ up to 600 seconds, using amorphous Si or Co/Ti on all substrates improved the thermal stability. This was attributed to the uniform chemical composition of initial CoSi, and its smooth interface with the substrates, induced by smooth and clean Si surface and delayed Co diffusion. The main factors determining the thermal stability were found to be composition uniformity and smooth interface of $CoSi_2$, intially formed at the early stage of the heat-treatment.

• Korean Journal of Materials Research
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• v.8 no.1
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• pp.80-84
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• 1998

본 연구에서는 석영을 기판으로 사용하여 텅스텐 실리사이드 게이트를 고온에서 결정화시키고, 이\ulcorner 발생되는 crack 에 대한 생성원인을 조사하였다. 증착된 텅스텐실리사이드의 실리콘 조성과 실리콘 완층충의 두께가 증가함에 따라 열응력이 감소하는 경향이 관찰되었으며, 과잉의 실리콘 조성을 가진 실리사이드를 열처리한 경우에는 crack에 대한 저항이 증가함을 알 수 있었다. 그러나 실리콘 완충층을 사용한 경우는 두께가 증가함에 따라 열응력이 감소하는 경향이 있으나, crack이 보다 쉽게 발생되는 결과를 얻었다. 이는 실리사이드 반응에 의하여 거칠어진 계면에 응력이 집중되어 crack생성을 쉽게하는 것으로 여겨진다. 결과적으로 석영과 텅스텐실리사이드의 열\ulcorner창계수차이에 의하여 생성되는 열응력이 crack생성의 주원인으로 작용하고, 실리콘 완층층을 사용한 구조하에서는 계면에서 일어나는 실리사이드반응이 crack생성에 큰 영향을 미치는 것으로 생각된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.80-81
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• 2008

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.230-233
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• 2001

FeSi2/Si Layer were grown using FeSi2, Si wafer by the chemical transport reactio nmethod. The directoptical energy gap was found to be 0.871eV at 300 K. The Hall effect is a physical effect arising in matter carrying electric current inthe presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. IN this paper, we study electrical properties of FeSi2/Si layer. And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important part for it applicationVarious phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.234-237
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• 2001

FeSi2/Si Layer were grown using FeSi2, Si wafer by the chemical transport reactio nmethod. The directoptical energy gap was found to be 0.871eV at 300 K. The Hall effect is a physical effect arising in matter carrying electric current inthe presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. IN this paper, we study electrical properties of FeSi2/Si layer. And then we measured Hall coefficient Hall mobility,carrier density and Hall voltage according to variation magnetic field and temperature, Because of important part for it applicationVarious phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.20-28
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• 2003

In this paper, we present results of the comparative analysis of the flicker phenomena in the poly-Si TFT-LCD and a-Si:H TFT-LCD arrays for the development and manufacturing of wide-area and high-quality TFT-LCD displays. We used four different types of TFTs; a-Si:H TFT, excimer laser annealed (ELA) poly-Si TFT, silicide mediated crystallization (SMC) poly-Si TFT, and counter-doped lateral body terminal (LBT), poly-Si TFT. We defined the electrical quantity of the flicker so that we could compare the flickers quantitatively for four different 40" UXGA TFT-LCDs. We identify three factors contributing to the flicker, such as charging time, kickback voltage and leakage current, and analyze how much each of three factors give rise to the flincker in the different TFT-LCD arrays. In addition, we suggest and show that, in the case of the poly-Si TFT-LCD arrays, the low-level (minimum) gate voltages should be carefully chosen to minimize the flicker because of their larger leakage currents compared with a-Si TFT-LCD arrays.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.6
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• pp.1581-1584
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• 2008

In dual-polycide-gate structure with butting contact, net doping concentration of polysilicon was decreased due to overlap between $n^+$ and $p^+$ and lateral dopant diffusion in silicide/polysilicon layers. The generation of parasitic Schottky diode in butting contact region is attributed both to the $CoSi_2$-loss due to $CoSi_2$ agglomeration and to the decrease in net doping concentration of polysilicon layer. Parasitic Schottky diode reduces noise margin of sense amplifier in DDI DRAM, which causes column fail. The column fail could be reduced by physical isolation of $n^+/p^+$ polysilicon junction or suppressing $CoSi_2$ agglomeration by using nitrogen implantation into $p^+$ polysilicon before $CoSi_2$ formation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.234-237
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• 2001

FeSi$_2$/Si Layer were grown using FeSi$_2$, Si wafer by the chemical transport reaction method. The directoptical energy gap was found to be 0.871ev at 300 K. The Hall effect is a physical effect arising in matter carrying electric current in the presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. In this paper, we study electrical properties of FeSi$_2$/Si layer And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important Part for it application Various phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.