• 대한용접접합학회:학술대회논문집
• /
• 대한용접접합학회 2002년도 춘계학술발표대회 개요집
• /
• pp.272-275
• /
• 2002

• 대한용접접합학회:학술대회논문집
• /
• 대한용접접합학회 2002년도 춘계학술발표대회 개요집
• /
• pp.276-277
• /
• 2002

• 한국재료학회:학술대회논문집
• /
• 한국재료학회 1998년도 추계학술발표강연 및 논문개요집
• /
• pp.80-80
• /
• 1998

• 대한기계학회:학술대회논문집
• /
• 대한기계학회 2003년도 추계학술대회
• /
• pp.1027-1032
• /
• 2003

Thermo-mechanical behavior of flip-chip plastic ball grid array (FC-PBGA) packages are characterized by high sensitive $Moir{\acute{e}}$ interferometry. $Moir{\acute{e}}$ fringe patterns are recorded and analyzed for several temperatures. Deformation analysis of bending displacements of the packages and average strains in the solder balls for a single-sided package assembly and a double-sided package assembly are presented. The bending displacement of the double-sided package assembly is smaller than that of the single-sided one. The largest of effective strain occurred in the solder ball located at the edge of the chip and its magnitude of the double-sided package assembly is greater than that of single-sided one.

• International Journal of Fuzzy Logic and Intelligent Systems
• /
• 제4권3호
• /
• pp.316-321
• /
• 2004

In this paper, we have developed a new mounting head system for flip chip. The proposed head system consists of a macro/micro positioning actuator for stable force control. The macro actuator provides the system with a gross motion while the micro device yields fine tuned motion to reduce the harmful impact force that occurs between very small sized electronic parts and the surface of a PCB(printed circuit board). In order to show the effectiveness of the proposed macro/micro chip mounting system, we compared the proposed system with the conventional chip mounting head equipped with a macro actuator only. A series of experiments were executed under the mounting conditions such as various access velocities and PCB stiffness. As a result of this study, a satisfactory voice coil actuator as the micro actuator has been developed, and its performance meet well the specifications desired for the design of the chip mounting head system and show good correspondence between theoretical analysis and experimental results.

• 한국마이크로전자및패키징학회:학술대회논문집
• /
• 한국마이크로전자및패키징학회 2000년도 2nd Korea-Japan Advanceed Semiconductor Packaging Technology Seminar
• /
• pp.39-45
• /
• 2000

A small camera module fabricated by including bare chip bonding methods is utilized to realize advanced mobile devices. One of the driving forces is the TOG (Tape On Glass) bonding method which reduces the packaging size of the image sensor clip. The TOG module is a new thinner and smaller image sensor module, using flip chip interconnection method with the ACP (Anisotropic Conductive Paste). The TOG production process was established by determining the optimum bonding conditions for both optical glass bonding and image sensor clip bonding lo the flexible PCB. The bonding conditions, including sufficient bonding margins, were studied. Another bonding method is the flip chip bonding method for DSP (Digital Signal Processor) chip. A new AC\ulcorner was developed to enable the short resin curing time of 10 sec. The bonding mechanism of the resin curing method was evaluated using FEM analysis. By using these flip chip bonding techniques, small camera module was realized.

• 한국마이크로전자및패키징학회:학술대회논문집
• /
• 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
• /
• pp.195-202
• /
• 2003

In this study, failure mechanisms of Au stud bumps/ACF flip chip joints were investigated underhigh current stressing condition. For the determination of allowable currents, I-V tests were performed on flip chip joints, and applied currents were measured as high as almost 4.2Amps $(4.42\times10^4\;Amp/cm^2)$. Degradation of flip chip joints was observed by in-situ monitoring of Au stud bumps-Al pads contact resistance. All failures, defined at infinite resistance, occurred at upward electron flow (from PCB pads to chip pads) applied bumps (UEB). However, failure did not occur at downward electron flow applied bumps (DEB). Only several $m\Omega$ contact resistance increased because of Au-Al intermetallic compound (IMC) growth. This polarity effect of Au stud bumps was different from that of solder bumps, and the mechanism was investigated by the calculation of chemical and electrical atomic flux. According to SEM and EDS results, major IMC phase was $Au_5Al_2$, and crack propagated along the interface between Au stud bump and IMC resulting in electrical failures at UEB. Therefore. failure mechanisms at Au stud bump/ACF flip chip Joint undo high current density condition are: 1) crack propagation, accompanied with Au-Al IMC growth. reduces contact area resulting in contact resistance increase; and 2) the polarity effect, depending on the direction of electrons. induces and accelerates the interfacial failure at UEBs.

• 한국마이크로전자및패키징학회:학술대회논문집
• /
• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
• /
• pp.43-55
• /
• 2000

In traditional electronic packages the die and the substrate are interconnected with fine wire. Wire bonding technology is limited to bond pads around the peripheral of the die. As the demand for I/O increases, there will be limitations with wire bonding technology. Flip chip technology eliminates the need for wire bonding by redistributing the bond pads over the entire surface of the die. Instead of wires, the die is attached to the substrate utilizing a direct solder connection. Although several steps and processes are eliminated when utilizing flip chip technology, there are several new problems that must be overcome. The main issue is the mismatch in the coefficient of thermal expansion (CTE) of the silicon die and the substrate. This mismatch will cause premature solder Joint failure. This issue can be compensated for by the use of an underfill material between the die and the substrate. Underfill helps to extend the working life of the device by providing environmental protection and structural integrity. Flux residues may interfere with the flow of underfill encapsulants causing gross solder voids and premature failure of the solder connection. Furthermore, flux residues may chemically react with the underfill polymer causing a change in its mechanical and thermal properties. As flip chip packages decrease in size, cleaning becomes more challenging. While package size continues to decrease, the total number of 1/0 continue to increase. As the I/O increases, the array density of the package increases and as the array density increases, the pitch decreases. If the pitch is decreasing, the standoff is also decreasing. This paper will present the keys to successful flip chip cleaning processes. Process parameters such as time, temperature, solvency, and impingement energy required for successful cleaning will be addressed. Flip chip packages will be cleaned and subjected to JEDEC level 3 testing, followed by accelerated stress testing. The devices will then be analyzed using acoustic microscopy and the results and conclusions reported.

• 한국공작기계학회논문집
• /
• 제18권1호
• /
• pp.116-121
• /
• 2009

Thermosonic flip chip bonding is an important technology for the electronic packaging due to its simplicity, cost effectiveness and clean and dry process. Mechanical properties of the horn and the shank, such as the natural frequency and the amplitude, have a great effect on the bonding capability of the transverse flip chip bonding system. In this research, two kinds of study are performed. The first is the new design of the clamp and the second is the effect of tolerance parameters to the performance of the system. The clamp with a bent shape is newly designed to hold the nodal point of the flip chip. The second is the effect of the design parameters on the vibration amplitude and planarity at the end of the shank. The variation of the tolerance parameters changes the amplitude and the frequency of the vibration of the shank. They, in turn, have an effect on the quantity of the plastic deformation of the gold ball bump, which determined the quality of the flip chip bonding. The tolerance parameters that give the great effect on the amplitude of the shank are determined using Taguchi's method. Error of set-up angle, the length and diameter of horn and error of the length of the shank are determined to be the parameters that have peat effect on the amplitude of the system.

• 마이크로전자및패키징학회지
• /
• 제19권3호
• /
• pp.71-76
• /
• 2012

SnBi 저온솔더의 플립칩 공정을 이용한 스마트 의류용 칩 접속공정에 대해 연구하였다. 캐리어 필름에 형성한 Cu 리드프레임을 $130^{\circ}C$에서 직물에 열압착 시킴으로써 Cu 리드프레임이 전사된 직물 기판을 형성하였다. 칩 시편에 SnBi 페이스트를 도포하여 솔더범프를 형성한 후 직물 기판의 Cu 리드프레임에 배열하고 $180^{\circ}C$에서 60초 동안 유지시켜 플립칩 본딩하였다. SnBi 저온솔더를 사용하여 형성된 스마트 의류용 플립칩 접속부의 평균 접속저항은 $9m{\Omega}$이었다.