• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.300-304
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• 2008

A novel characterization method was investigated to estimate the trap generation during the program /erase cycles in nand flash memory cell. Utilizing Fowler-Nordheim tunneling current, floating gate potential and oxide electric field, we established a quantitative model which allows the knowledge of threshold voltage (Vth) as a function of either program or erase operation time. Based on our model, the derived results proved that interface trap density (Nit) term is only included in the program operation equation, while both Nit and oxide trap density (Not) term are included in the erase operation equation. The effectiveness of our model was tested using 50 nm nand flash memory cell with floating gate type. Nit and Not were extracted through the analysis of Program/Erase speed with respect to the endurance cycle. Trap generation and cycle numbers showed the power dependency. Finally, with the measurement of the experiment concerning the variation of cell Vth with respect to program/erase cycles, we obtained the novel quantitative model which shows similar results of relationship between experimental values and extracted ones.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.302-304
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• 2013

The embedded systems on linux environment, commonly equip a file system as mini hard disk or flash memory to keep data. The types of the file system of the system are various according to it's operating system. Anyway, the more embedded system depends on the file system, the selection of the type of the file system effects more on the performance of the system. This thesis performs the performance benchmark of a FAT and Ext file systems. As the result, it is discussed that what file system is better at which case. These results are helpful at the selection of flash file system of the embedded systems on linux environment.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.1-7
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• 2000

The SNOSFET memory devices with ultrathin ONO(tunnel oxide-nitride-blocking oxide) gate dielectric were fabricated using n-well CMOS process and investigated its characteristics. The thicknesses of tunnel oxide, nitride and blocking oxide were $23{\AA},\; 53{\AA}\; and\; 33{\AA}$, respectively. Auger analysis shows that the ONO layer is made up of $SiO_2(upper layer of blocking oxide)/O-rich\; SiO_x\N\_y$. It clearly shows that the converting layer with $SiO_x\N\_y(lower layer of blocking oxide)/N-rich SiO_x\N\_y(nitride)/O-rich SiO_x\N\_y(tunnel oxide)$. It clearly shows that the converting layer with $SiO_x\N\_y$ phase exists near the interface between the blocking oxide and nitride. The programming condition of +8 V, 20 ms, -8 V, 50 ms is determined and data retention over 10 years is obtained. Under the condition of 8 V programming, it was confirmed that the modified Fowler-Nordheim tunneling id dominant charge transport mechanism. The programmed threshold voltage is distributed less than 0.1 V so that the reading error of memory stated can be minimized. An $8\times8$ NAND type flash EEPROM with SONOSFET memory cell was designed and simulated with the extracted SPICE parameters. The sufficient read cell current was obtained and the upper limit of $V_{TH}$ for write state was over 2V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.11
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• pp.914-920
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• 2000

When the charge-trap type SONOS(polysilicon-oxide-nitride-oxide-semiconductor) cells are used to flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM(Nonvolatile Semiconductor Memory) cells were fabricated using 0.35 ㎛ standard memory cell embedded logic process including the ONO cell process, based on retrograde twin-well, single-poly, single metal CMOS(Complementary Metal Oxide Semiconductor) process. The thickness of ONO triple-dielectric for the memory cell is tunnel oxide of 24 $\AA$, nitride of 74 $\AA$, blocking oxide of 25 $\AA$, respectively. The program mode(V$\_$g/=7, 8, 9 V, V$\_$s/=V$\_$d/=-3 V, V$\_$b/=floating) and the erase mode(V$\_$g/=-4, -5, -6 V, V$\_$s/=V$\_$d/=floating, V$\_$b/=3 V) by MFN(Modified Fowler-Nordheim) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation(ΔV$\_$th/, S, G$\_$m/) characteristics than channel MFN tunneling operation. Also, the program inhibit conditins of unselected cell for separated source lines NOR-type flash memory application were investigated. we demonstrated that the phenomenon of the program disturb did not occur at source/drain voltage of 1 V∼12 V and gate voltage of -8 V∼4 V.

• Korean Journal of Optics and Photonics
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• v.27 no.1
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• pp.18-24
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• 2016

To effectively utilize a flash and predict its effects on an infrared device, it is essential to know the infrared characteristics of the flash source. In this paper, a study of the IR characteristics of flash light sources is carried out. The IR characteristics of three flash sources, of which two are combustive and the other is explosive, are measured with an IR characteristic measurement system over the middle- and long-wavelength infrared ranges. From the measurements, the radiances over the two IR ranges and the radiative temperatures of the flashes are extracted. The IR radiance of flash A is found to be the strongest among the three, followed by those of sources C and B. It is also shown that the IR radiance of flash A is about 10 times stronger than that of flash B, even though these two sources are the same type of flash with the same powder. This means that the IR radiance intensity of a combustive flash source depends only on the amount of powder, not on the characteristics of the powder. From the measured radiance over MWIR and LWIR ranges for each flashes, the radiative temperatures of the flashes are extracted by fitting the measured data to blackbody radiance. The best-fit radiative temperatures (equivalent to black-body temperatures) of the three flash sources A, B, and C are 3300, 1120, and 1640 K respectively. From the radiance measurements and radiative temperatures of the three flash sources, it is shown that a combustive source radiates more IR energy than an explosive one; this mean, in turn, that the effects of a combustive flash on an IR device are more profound than those of an explosive flash source. The measured IR radiances and radiative temperatures of the flash sources in this study can be used to estimate the effects of flashes on various IR devices, and play a critical role for the modeling and simulation of the effects of a flash source on various IR devices.

• Journal of Mechanical Science and Technology
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• v.15 no.6
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• pp.685-692
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• 2001

This paper reports on the mixed lubrication characteristics between the cam and the tappet contact surface of direct acting type valve train systems. First, the dynamic characteristics are solved by using the lumped mass method to determine the load conditions at the contact point. Then, the minimum oil film thickness is calculated with consideration of elastohydrodynamic line contact theory and the friction force is obtained by using the mixed lubrication model which separates the hydrodynamic and the boundary friction. Finally, the average surface temperatures are calculated by using the flash temperature theory. The results show that, there are some peaks in the friction force due to the asperity contact friction, and flash temperature at the position of minimum oil film thickness. It is thought that there is a relationship between the surface temperature and cam surface wear, and therefore, the analysis on the worn cam profile has been performed.

• Proceedings of the KIEE Conference
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• 2004.05a
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• pp.147-149
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• 2004

Although most of the people have studied English for a long time, their English conversation capability is low. When we provide them portable conversational-type English learners by the application of computer and information process technology, such portable learners can be used to enhance their English conversation capability by their conventional conversation exercises. The core technology to develop such learner is the development of a voice recognition and synthesis module under an embedded environment. This paper deals with voice recognition and synthesis, prototype of the learner module using a DSP(Digital Signal Processing) chip for voice processing, voice playback function, flash memory file system, PC download function using USB ports, English conversation text function by the use of SMC(Smart Media Card) flash memory, LCD display function, MP3 music listening function, etc. Application areas of the prototype equipped with such various functions are vast, i.e. portable language learners, amusement devices, kids toy, control by voice, security by the use of voice, etc.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.378-388
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• 2008

Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.11
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• pp.56-62
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• 1999

All the cells on the whole memory array or a block of the memory array in the Flash EEPROM's are erased at the same time using Fowler-Nordheim (FN) tunneling. some of the cels are often overerased since the tunneling is not a self-limited process. In this paper, the optimum doping concentration of the floating gate solve the overerase problem has been studied. For these studies, N-type MOSFETs and MOS capacitors with various doping concentrations of the gate polysilicon have been fabricated and their electrical characteristics have been measured and analyzed. As the results of the experiment, it has been found that the overerase problem can be prevented if the doping concentration of the floating gate is low enough (i.e. below $1.3{\times}10^{18}/cm^3$). It is because the potential difference between the floating gate and the source is lowered due to the formation of the depletion layer in the floating gate and thus the erasing operation stops by itself after most of the electrons stored in the floating gate are extracted. On the other hand, the uniformity of the Vt and the gm has been significantly poor if the coping concentration of the floating, gate is too much lowered (i.e. below $1.3{\times}10^{17}/cm^3$), which is believed to be due to nonuniform loss of the dopants from the nonuniform segregation in the floating gate. Consequently, the optimum doping concentration of the floating gate to suppress the overerase problem and get the uniform Vt and has been found to range from $1.3{\times}10^{17}/cm^3$ to $1.3{\times}10^{18}/cm^3$ in the Flash EEPROM.

• Transactions of the Korean Society of Mechanical Engineers
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• v.16 no.11
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• pp.2082-2089
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• 1992

An experimental study on forging an axi-symmetric dome type of AISI4130 was carried out using modeling material. In order to verify the validity of the experimental data, a similarity study between plasticine and AISI4130 has been made. Friction conditions were characterized by ring test for the various lubricants. For the closed-die forging experiments of an axi-symmetric dome type of AISI4130 using the plasticine, various cylindrical billets with different aspect ratios were forged and different flash width to thickness(W/T) ratios were used in order to determine the optimum forging conditions. As W/T ratios decrease forging loads decrease while excess volumes increase. It was found out that the experimental results reproduce the similiar results available in the literature. As a result of these experiments, it was construed physical modeling is an excellent tool for forging process simulation at a practical level.