• 제목/요약/키워드: fine-pitch

검색결과 182건 처리시간 0.024초

Fine Pitch 표면실장기술의 동향 (Fine Pitch Surface mount Technology)

  • 안승호
    • Journal of Welding and Joining
    • /
    • 제13권4호
    • /
    • pp.30-35
    • /
    • 1995
  • 전자기기의 소형화는 앞으로도 계속 진행될 것이므로, 이에 필요한 Fine Pitch 또는 고밀도 실장기술의 개발이 지속적으로 요구될 것으로 생각된다. 앞에서 언급한 3가지 Fine Pitch 표면실장을 위한 Solder 합금의 공급 방법중에서 종래의 Screen Print 방법과 Projected Solder Pre-coat 방법은 0.3mm Pitch가 한계인 것으로 생각되며, Super Solder Pro-coat 방법은 좀 더 Fine Pitch 까지도 사용 가능한 기술 로 생각된다. 이외에도 0.1mm 보다 미세한 Pitch의 표면실장을 위하여, Solder에 의한 접합이 아닌, 이방성 도전 접착제와 같은 도전성 매개체를 통하여 접촉에 의한 표면 실장의 개념도 도입하고 있다.

  • PDF

Fine-pitch 소자 적용을 위한 bumpless 배선 시스템 (Bumpless Interconnect System for Fine-pitch Devices)

  • 김사라은경
    • 마이크로전자및패키징학회지
    • /
    • 제21권3호
    • /
    • pp.1-6
    • /
    • 2014
  • 차세대 전자소자는 입출력(I/O) 핀 수의 증가, 전력소모의 감소, 소형화 등으로 인해 fine-pitch 배선 시스템이 요구되고 있다. Fine-pitch 특히 10 um 이하의 fine-pitch에서는 기존의 무연솔더나 Cu pillar/solder cap 구조를 사용할 수 없기 때문에 Cu-to-Cu bumpless 배선 시스템은 2D/3D 소자 구조에서 매우 필요한 기술이라 하겠다. Bumpless 배선 기술로는 BBUL 기술, 접착제를 이용한 WOW의 본딩 기술, SAB 기술, SAM 기술, 그리고 Cu-to-Cu 열압착 본딩 기술 등이 연구되고 있다. Fine-pitch Cu-to-Cu interconnect 기술은 연결 방법에 상관없이 Cu 층의 불순물을 제거하는 표면 처리 공정, 표면 활성화, 표면 평탄도 및 거칠기가 매우 중요한 요소라 하겠다.

Fine-Pitch Solder on Pad Process for Microbump Interconnection

  • Bae, Hyun-Cheol;Lee, Haksun;Choi, Kwang-Seong;Eom, Yong-Sung
    • ETRI Journal
    • /
    • 제35권6호
    • /
    • pp.1152-1155
    • /
    • 2013
  • A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

Consideration on Fine Pitch WLCSP Application

  • 박종욱
    • 한국마이크로전자및패키징학회:학술대회논문집
    • /
    • 한국마이크로전자및패키징학회 2005년도 ISMP
    • /
    • pp.157-172
    • /
    • 2005
  • 기존 단말기에 Fine Pitch (0.3mm) WLCSP를 개발/적용해 봄으로써 SMT 조립 한계로 인식되고 있는 Pitch인 0.4mm이하의 접속 기술을 검증함. Set Maker 입장에서 Fine Pitch를 가진 Customized Package를 적용할 경우, Design 단계에서부터 부품, 기판, 조립공법, Infrastructure등을 동시에 검토해야 함. 이동단말의 소형화/박형화 경쟁이 가속화 되는 가운데 Package Pitch만을 고려해 볼 때, 2006년에는 0.4mm Pitch를 가진 BGA의 적용이 확대 될 것으로 예상되며 일부 제품에서 0.3mm Pitch Package의 적용도 예상됨.

  • PDF

레이저 미세피치 홀 가공의 생산효율성 향상을 위한 영상처리 측정 기법 적용 (Application of Image Processing Technique to Improve Production Efficiency of Fine Pitch Hole Based on Laser)

  • 표창률
    • 소성∙가공
    • /
    • 제19권5호
    • /
    • pp.320-324
    • /
    • 2010
  • Multi-Layer Ceramic Circuit(MLCC) in the face of thousands of fine pitch multi hole is processed. However, the fine pitch multi hole has a size of only a few micrometers. Therefore, in order to curtail the measurement time and reduce error, the image processing measurement method is required. So, we proposed an image processing measurement algorithm which is required to accurately measure the fine pitch multi hole. The proposed algorithm gets image of the fine pitch multi hole, extracts object from the image by morphological process, and extracts the parameters of its position and feature by edge detecting process. In addition, we have used the sub-pixel algorithm to improve accuracy. As a result, the proposed algorithm shows 97% test-retest measurement reliability within 2 ${\mu}m$. We found that the algorithm was wellsuited for measuring the fine pitch multi hole.

Novel Low-Volume Solder-on-Pad Process for Fine Pitch Cu Pillar Bump Interconnection

  • Bae, Hyun-Cheol;Lee, Haksun;Eom, Yong-Sung;Choi, Kwang-Seong
    • 마이크로전자및패키징학회지
    • /
    • 제22권2호
    • /
    • pp.55-59
    • /
    • 2015
  • Novel low-volume solder-on-pad (SoP) process is proposed for a fine pitch Cu pillar bump interconnection. A novel solder bumping material (SBM) has been developed for the $60{\mu}m$ pitch SoP using screen printing process. SBM, which is composed of ternary Sn-3.0Ag-0.5Cu (SAC305) solder powder and a polymer resin, is a paste material to perform a fine-pitch SoP in place of the electroplating process. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder; the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. The Si chip and substrate with daisy-chain pattern are fabricated to develop the fine pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si substrate has 6724 under bump metallization (UBM) with a $45{\mu}m$ diameter and $60{\mu}m$ pitch. The Si chip with Cu pillar bump is flip chip bonded with the SoP formed substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of underfill. The optimized interconnection process has been validated by the electrical characterization of the daisy-chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and micro bump interconnection using a screen printing process.

Weight Loss and Nutrients Dynamics during the Decomposition of Fine Roots

  • Mun, Hyeong-Tae;Pyo, Jae-Hoon;Shin, Chang-Hwan;Namgung, Jeong;Kim, Jeong-Hee
    • The Korean Journal of Ecology
    • /
    • 제25권1호
    • /
    • pp.41-44
    • /
    • 2002
  • Weight loss, N and P dynamics during decomposition of fine roots (<2mm) of alder(Alnus japonica), oak (Quercus acutissima) and pitch pine(Pinus rigida) were studied for 33 months in Kongju, Korea. After 33 months, remaining weight of fine roots of alder, oak and pitch pine was 29.2%, 47.7% and 53.4% of the initial weight, respectively. The decomposition rate constant (k) for alder, oak and pitch pine was 0.448 $yr^1$, 0.269 $yr^1$, 0.228 $yr^1$, respectively. Initial concentration of N and P in fine roots was 10.32mg/g and 0.69mg/g for alder, 6.20mg/g and 0.37mg/g for oak and 7.26mg/g and 0.44mg/g for pitch pine, respectively. Initial concentration of N and P in alder were higher than those in oak and pitch pine. After 33 months, remaining N and P in fine roots was 39.5$\%$ and 31.8$\%$ for alder, 59.4$\%$ and 57.8$\%$ for oak, 63.0$\%$ and 83.4$\%$ for pitch pine, respectively. Decomposition rate and the rate of N released from decomposing fine roots was positively correlated with the initial N concentration of the fine roots.

Fine pitch probe 제작을 위한 고세장비 마이크로 구조물 제작 (Fabrication of High Aspect Ratio Micro Structure for fine pitch probe production)

  • 이상일;김웅겸;표창률;김대용;양승진;고귀현;김학준;전병희
    • 한국소성가공학회:학술대회논문집
    • /
    • 한국소성가공학회 2007년도 추계학술대회 논문집
    • /
    • pp.356-359
    • /
    • 2007
  • Continuing improvements in integrated circuit chip density and functionality have mostly contributed toward a very large-scale integrated circuit(VLSI) and display device. In order to test (pass or fail) all of the high integrated semiconductor chip and display device, fine pitch probes are used. Fine pitch probes are manufactured by electroforming process of a Ni alloy in an electrolytic bath. In this paper, we expect that the electric field in bath with the Finite Element Method and applying the FEM result. So, we can obtained the probes that have high aspect ratio of 10 : 1

  • PDF

새로운 구조의 동축 테스트 소켓을 이용한 미세 피치 프로브 핀의 신호 전달 특성 개선 (Improvement of Signal Transfer Characteristics of Fine Pitch Probe Pin Using Coaxial Test Socket with New Structure)

  • 서정준;김문정
    • 반도체디스플레이기술학회지
    • /
    • 제23권1호
    • /
    • pp.97-103
    • /
    • 2024
  • In this paper, the difference between the S-parameter and the characteristic impedance according to the structural change of the fine pitch coaxial socket was analyzed. A pitch of the probe pin was applied to 0.20mm, and ground pins of different conditions were placed on each of the five signal pins. Insertion loss and reflection loss were analyzed for the coaxial socket of normal structure and the two sockets of the proposed structure. In addition, the difference in characteristic impedance was analyzed using time domain reflectometry. Through the analysis, it was confirmed that the characteristic impedance was improved applying the new structures of the socket at the same pitch

  • PDF