• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.705-706
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• 2010

• Transactions of the Society of Information Storage Systems
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• v.3 no.2
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• pp.94-112
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• 2007

Nano-sized inverted domain dots in ferroelectric materials have potential application in ultrahigh-density rewritable data storage systems. Herein, a data storage system is presented based on scanning non-linear dielectric microscopy and a thin film of ferroelectric single-crystal lithium tantalite. Through domain engineering, we succeeded to form an smallest artificial nano-domain single dot of 5.1 nm in diameter and artificial nano-domain dot-array with a memory density of 10.1 Tbit/$inch^2$ and a bit spacing of 8.0 nm, representing the highest memory density for rewritable data storage reported to date. Sub-nanosecond (500psec) domain switching speed also has been achieved. Next, long term retention characteristic of data with inverted domain dots is investigated by conducting heat treatment test. Obtained life time of inverted dot with the radius of 50nm was 16.9 years at $80^{\circ}C$. Finally, actual information storage with low bit error and high memory density was performed. A bit error ratio of less than $1\times10^{-4}$ was achieved at an areal density of 258 Gbit/inch2. Moreover, actual information storage is demonstrated at a density of 1 Tbit/$inch^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.171-172
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• 2007

We fabricated the metal-ferroelectric-insulator-semiconductor filed-effect transistors (MFIS-FETs) using the $(Bi,La)_4Ti_3O_{12}\;and\;LaZrO_x$ thin films. The $LaZrO_x$ thin film had a equivalent oxide thickness (EOT) value of 8.7 nm. From the capacitance-voltage (C-V) measurements for an Au/$(Bi,La)_4Ti_3O_{12}/LaZrO_x$/Si MFIS capacitor, a hysteric shift with a clockwise direction was observed and the memory window width was about 1.4 V for the bias voltage sweeping of ${\pm}9V$. From drain current-gate voltage $(I_D-V_G)$ characteristics of the fabricated Fe-FETs, the obtained threshold voltage shift (memory window) was about 1 V due to ferroelectric nature of BLT film. The drain current-drain voltage $(I_D-V_D)$ characteristics of the fabricated Fe-FETs showed typical n-channel FETs current-voltage characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.112-112
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• 2009

Temperature dependence of the ferroelectric properties of poly(vinylidefluoride-trifluoroethylene) copolymer thin films are studied with various insulators such as $SrTa_2O_6$ and $La_2O_3$. Thin films of poly(vinylidene fluoridetrifluoroethylene) 75/25 copolymer were prepared by chemical solution deposition on p-Si substrate. Capacitance-voltage (C-V) and current density (J-V) behavior of the Au/P(VDF-TrFE)/Insulator/p-Si structures were studied at ($150-200\;^{\circ}C$) and dielectric constant of the each insulators were measured to be about 15 at $850\;^{\circ}C$ for 10 minutes. Memory window width at 5 V bias the MFIS(metal-ferroelectric-insulator-semiconductor) structure with as deposited films was about 0.5 V at high temperature ($200\;^{\circ}C$). And the memory window width increased as voltage increased from 1 V to 5 V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.2
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• pp.106-110
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• 1998

The $LiNbO_3$ thin films were prepared directly on Si(100) substrates by conventional RF magnetron spurttering system for nonvolatile memory applications. RTA(Rapid Thermal Annealing) treatment was performed for as-deposited films in an oxygen atmosphere at 600 $^{\circ}C$ for 60 s. The rapid thermal annealed films were changed to poly-crystalline ferroelectric nature from amorphous of as-deposition. The resistivity of the ferroelectric $LiNbO_3$ film was increased from a typical value of $1{\sim}2{\times}10^8{\Omega}{\cdot}cm$ before the annealing to about $1{\times}10^{13}{\Omega}{\cdot}cm$ at 500 kV/cm and reduced the interface state density of the $LiNbO_3/Si$ (100) interface to about $1{\times}10^{11}/cm^2{\cdot}eV$. Ferroelectric hysteresis measurements using a Sawyer-Tower circuit yielded remanent polarization ($P_r$) and coercive field ($E_c$) values of about 1.2 ${\mu}C/cm^2$ and 120 kV/cm, respectively.

• Transactions on Electrical and Electronic Materials
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• v.12 no.6
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• pp.258-261
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• 2011

A ferroelectric $(Bi,La)_4Ti_3O_{12}$ (BLT) thin film fabricated by the pulsed-DC sputtering method was evaluated on a cell structure to check its compatibility to high density ferroelectric random access memory (FeRAM) devices. The BLT composition in the sputtering target was $Bi_{4.8}La_{1.0}Ti_{3.0}O_{12}$. Firstly, a BLT film was deposited on a buried Pt/$IrO_x$/Ir bottom electrode stack with W-plug connected to the transistor in a lower place. Then, the film was finally crystallized at $700^{\circ}C$ for 30 seconds in oxygen ambient. The annealed BLT layer was found to have randomly oriented and small ellipsoidal-shaped grains (long direction: ~100 nm, short direction: ~20 nm). The small and uniform-sized grains with random orientations were considered to be suitable for high density FeRAM devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.107-110
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• 2002

The optical memory devices of BST thin films to composite $(Ba_{0.7}\;Sr_{0.3})TiO_{3}$ using sol-gel method were fabricated by changing of the depositing layer number on $Pt/Ti/SiO_{2}/Si$ substrate. The structural properties of optical memory devices to be ferroelectric was investigated by fractal analysis and 3-dimension image processing. The thickness of BST thin films at each coating numbers 3, 4 and 5 times was $2500[\AA]$, $3500[\AA]$ and $3800[\AA]$. BST thin films exhibited the most pronounced grain growth. The surface morphology image was roughness with coating numbers. The thin films increasing with coating numbers shows a more textured and complex configuration.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1132-1134
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• 2006

In this research, we examined the correlation between the polymer wall boundary condition and the dynamic/ memory behavior of the ferroelectric liquid crystal (FLC) molecules. It was shown that the polymer wall perpendicular to the rubbing direction induces asymmetric switching to the rubbing direction and induce smaller cone angle angle of LC. On the contrary, in the cell with polymer wall parallel to the rubbing direction, the FLC molecules are oriented in the rubbing direction and shows symmetric switching and has larger cone angle. Memory behavior of each cell has strong correlation with the dynamic state of the FLC molecules. Response time of each cell was also examined.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.82-82
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• 1999

Ferroelectric materials are characterized by the existence of a spontaneous remnant polarization that can be switched between two stable states by an applied field. This phenomenon is known as ferroelectricity. The ferroelectricity can be utilized for nonvolatile memory application. Up to now 256K FRAM was successfully fabricated and sold in the memory market. This paper will briefly review the current statue of ferroelectric random access memory (FRAM) focusing on recent developments. In addition, the future prospects of FRAM will be addressed.

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.64.1-64
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• 2003

A metal-ferroelectric [SrBi$_2$Ta$_2$O$\_$9/ (SBT)-high-k-insulator(PrOx)-semiconductor(Si) structure has been fabricated and evaluated as a key part of metal-ferroelectric-insulator-semiconductor-field-effect-transistor MFIS-FET memory, aiming to improve the memory retention characteristics by increasing the dielectric constant in the insulator layer and suppressing the depolarization field in the SBT layer. A 20-nm PrOx film grown on Si(100) showed both a high of about 12 and a low leakage current density of less than 1${\times}$ 10e-8 A/$\textrm{cm}^2$ at 105 MV/cm. A 400-nm SBT film prepared on PrOx/Si shows a preferentially oriented (105) crystalline structure, grain size of about 130 nm and subface roughness of 3.2 nm. A capacitance-voltage hysteresis is confirmed on the Pt/SBT/PrOx/Si diode with a memory window of 0.3V at a sweep voltage width of 12 V. The memory retention time was about 1 104s, comparable to the conventional Pt/SBT/SiO$\_$x/N$\_$y/(SiO$\_$N/)/Si. The gradual change of the capacitance indicates that some memory degradation mechanism is different from that in the Pt/SBT/SiON/Si structure.