• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.25-28
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• 1999

Metal ferroelectric semiconductor Field Effect- Transistors(MFSFET) with various gate electrodes, that are aluminum, platinum and poly -Si, using LiNbO$_3$/Si(100) structures were fabricated and the properties of the FETs have been discussed. The drain current of the state of FET with Pt electrode was more than 3 orders of magnitude larger than the state current at the same gate voltage of 1.5 V, 7.rich means the memory operation of the MFSFET. A write voltage as low as about $\pm$4 V, which is applicable to low power integrated circuits, was used for polarization reversal. The retention properties of the FET using Al electrode were quite good up to about 10$^3$s and using Pt electrode remained almost the same value of its initial value over 2 days at room temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.66-66
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• 2007

Lead zirconate titanate (PZT) is one of the most attractive perovskite-type materials for ferroelectric random access memory (FRAM) due to its higher remanant polarization and the ability to withstand higher coercive fields. We first applied the damascene process using chemical mechanical polishing (CMP) to fabricate the PZT thin film capacitor to solve the problems of plasma etching including low etching profile and ion charging. The $0.8{\times}0.8\;{\mu}m$ square patterns of silicon dioxide on Pt/Ti/$SiO_2$/Si substrate were coated by sol-gel method with the precursor solution of PZT. Damascene process by CMP was performed to pattern the PZT thin film with the vertical sidewall and no plasma damage. The polarization-voltage (P-V) characteristics of PZT capacitors and the current-voltage characteristics (I-V) were examined by change of process parameters. To examine the CMP induced damage to PZT capacitor, the domain structure of the polished PZT thin film was also investigated by piezoresponse force microscopy (PFM).

• Journal of the Korean institute of surface engineering
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• v.55 no.5
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• pp.247-260
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• 2022

Since the first report on ferroelectricity in Si-doped hafnia (HfO2), this emerging ferroelectrics have been considered promising for the next-generation semiconductor devices with their characteristic nonvolatile data storage. The robust ferroelectricity in the sub-10-nm thickness regime has been proven by numerous research groups. However, extending their scalability below the 5 nm thickness with low temperature processes compatible with the back-end-of-line technology. In this review, therefore, the current status, technical issues, and their potential solutions of atomic layer deposition (ALD) of HfO₂-based ferroelectrics are comprehensively reviewed. Several technical issues in the physical scaling of the ferroelectric thin films and potential solutions including advanced ALD techniques including discrete feeding ALD, atomic layer etching, and area selective ALD are introduced.

• The Korean Journal of Ceramics
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• v.6 no.3
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• pp.276-279
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• 2000

Ferroelectric properties of $SrBi_2TaNbO_9$ (SBTN) thin films were changed by the amount of Bi content in SBTN. We suggested that the addition of excess Bi into the films could be accomplished by heat-treating $SBTN/Bi_2O_3/SBTN$ heterostructure fabricated by r.f. magnetron sputtering method. Excess Bi composition was controlled by the thickness of the sandwiched $Bi_2O_3$ from 0 to $400\;\AA$. When the SBTN thin films were inserted by $400\;{\AA}\;Bi_2O_3$ layer, $Bi_2Pt$ phase was formed as a second phase in SBTN films, resulting in poor ferroelectric properties. The onset temperature for hysteresis loop can be reduced by heat treating $SBTN/Bi_2O_3/SBTN$ heterostructure. The films with $SBTN/Bi_2O_3(100\;{\AA})/SBTN$ hetero-structure followed by annealing at $650^{\circ}C$ for 30 min show 2Pr and Ec of $5.66\;{\mu}C/\textrm{cm}^2$ and 54 kV/cm, respectively.

• Transactions on Electrical and Electronic Materials
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• v.5 no.6
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• pp.223-226
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• 2004

The PZT thin films are one of well-known materials that has been widely studied for ferroelectric random access memory (FRAM). We etched the PZT thin films by $CF_{4}/(Cl_{2}+Ar)$ plasma and investigated improvement in etching damage by $O_{2}$ annealing. The maximum etch rate of the PZT thin films was 157 nrn/min and that the selectivity of the PZT thin films to Pt was 3.1 when $CF_{4}(30{\%})$ was added to a $Cl_{2}(80{\%})/Ar(20{\%})$ gas mixing ratio. To improve the ferroelectric properties of PZT thin films after etching, the samples were annealed for 10 min at various temperatures in $O_{2}$ atmosphere. After $O_{2}$ annealing, the remanent polarization of the asdeposited films was $34.6{\mu}/cm^{2}$ and the sample annealed at 650, 550, and $450^{\circ}C$ was 32.8, 22.3, and $18.6{\mu}/cm^{2}$, respectively. PZT thin films with $O_{2}$ annealing at $450^{\circ}C$ retained $77{\%}$ of their original polarization at 106 cycles. Also as the annealing temperature increased, the fatigue properties improved. And the leakage current was decreased gradually and almost recovered to the as-deposited value after the annealing at $450^{\circ}C$.

• Korean Journal of Materials Research
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• v.12 no.5
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• pp.382-386
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• 2002

We studied growth and characterization of $SrBi_2Ta_2O_9$ (SBT) thin films fabricated by low temperature process under vacuum and/or oxygen ambient. A metal organic decomposition (MOD) method based on a spin-on technique and annealing process using a rapid thermal annealing (RTA) method was used to prepare the SBT films. The crystallinity of a ferroelectric phase of SBT thin films is related to the oxygen partial pressure during RTA process. Under an oxygen partial pressure higher than 30 Torr, the crystallization temperature inducing the ferroelectric SBT phase can be lowered to $650^{\circ}C$. Those films annealed at $650^{\circ}C$ in vacuum and oxygen ambient showed good ferroelectric properties, that is, the memory window of 0.5~0.9 V at applied voltage of 3~7 V and the leakage current density of 1.80{\times}10^{-8}$ A/$\textrm{cm}^2$ at an applied voltage of 5V. In comparison with the SBT thin films prepared at 80$0^{\circ}C$ in $O_2$ ambient by furnace annealing process, the SBT thin films prepared at $650^{\circ}C$ in vacuum and oxygen ambient using the RTA process showed a good crystallization and electrical properties which would be able to apply to the virtul device fabrication precess.

• Journal of the Korean Ceramic Society
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• v.37 no.11
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• pp.1051-1057
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• 2000

TiO$_2$와 CeO$_2$박막을 Si 위에 증착한 후 MOCVD법에 의해 PbTiO$_3$박막을 증착하여 MFIS 구조를 형성하였다. 절연층의 후열처리가 절연층 및 MFIS 구조의 전기적 특성에 미치는 영향을 관찰하기 위해 산소분위기와 $600^{\circ}C$~90$0^{\circ}C$의 온도범위에서 후 열처리를 행하였고, C-V 특성 및 누설전류 특성을 분석하였다. CeO$_2$와 TiO$_2$박막의 유전상수는 증착 직후 6.9와 15였으며, 90$0^{\circ}C$ 열처리를 행한 후 약 4.9와 8.8로 감소하였다. 누설전류밀도 역시 증착 직후 각각 7$\times$$10^{-5}$ A/$ extrm{cm}^2$와 2.5$\times$$10^{-5}$ A/$\textrm{cm}^2$에서 90$0^{\circ}C$ 열처리를 거친 후에 약 4$\times$$10^{-8}$ A/$\textrm{cm}^2$와 4$\times$$10^{-9}$ A/$\textrm{cm}^2$로 감소하였다. Ellipsometry 시뮬레이션을 통해 계산된 계면층의 두께는 90$0^{\circ}C$에서 약 115$\AA$(CeO$_2$) 및 140$\AA$(TiO$_2$)까지 증가하였다. 계면층은 MFIS 구조에서 강유전층에 인가되는 전계를 감소시켜 항전계를 증가시켰고, charge injection을 방지하여 Al/PbTiO$_3$/CeO$_2$(90$0^{\circ}C$, $O_2$)/Si 구조의 경우 $\pm$2 V~$\pm$10 V의 측정범위에서 memory window가 계속 증가하는 것을 보여주었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.321-322
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• 2006

The electrical properties of PZT thin film capacitor on TiN/W plug structure were investigated for high density ferroelectric memory devices. In order to enhance the ferroelectric properties of PZT capacitor, the process conditions of bottom electrodes were optimized. The fabricated PZT capacitor on TiN/W plug showed good remanent polarization, leakage current, and contact resistance of TiN/W plug, which were $33\;{\mu}C/cm^2$, $1.2{\times}10^{-6}\;A/cm^2$, and 5.3 ohm/contact, respectively.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.136-143
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• 2000

$SrBi_2Ta_2O_9;(SBT)$ films were deposited on p-type Si(100) at room temperature by rf magnetron sputtering method to confirm the possibility of application of $Pt/SBT/Pt/Ti/SiO_2/Si$ structure (MFM) for destructive read out ferroelectric RAM (random access memory). Their structural characteristics with the various annealing times and Ar/$O_2$ gas flow ratios in sputtering were observed by XRD (X-ray diffractometer) and the surface morphologies were observed by FE-SEM (field emission scanning electron microscopy), and their electrical properties were observed by P-V (polarization-voltage measurement) and I-V (current-voltage measurement). The Ar/$O_2$ gas flow ratios of sputtering gas were changed from 1 : 4 to 4 : 1 and SBT thin films were deposited at room temperature. The films show (105), (110) peaks of SBT by XRD measurement. SBT thin films deposited at room temperature were crystallized by furnace annealing at 80$0^{\circ}C$ in oxygen atmosphere during either one hour or two hours. Among their electrical properties, P-V curves showed shaped hysteresis curves, but the SBT thin films showed the asymmetric ferroelectric properties in P-V curves. When Ar/$O_2$ gas flow ratios are 1 : 1, 2: 1, the leakage current density values of SBT thin films are good, those values of 3 V, 5 V, and 7 V are respectively $3.11\times10^{-8} \textrm{A/cm}^2$, $5\times10^{-8}\textrm{A/cm}^2$, $7\times10^{-8}\textrm{A/cm}^2$.After two hours of annealing time, their electrical properties and crystallization are improved.

• Korean Journal of Materials Research
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• v.12 no.6
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• pp.464-469
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• 2002

$SrBi_2Nb_2O_9(SBN)$ thin films were grown on Pt/Ti/Si and p-type Si(100) substrates by rf-magnetron co-sputtering method using two ceramic targets, $SrNb_2O_6\; and \;Bi_2O_3$. The structural and electrical characteristics have been investigated to confirm the possibility of the SBN thin films for the applications to destructive and nondestructive read out ferroelectric random access memory(FRAM). For the optimum growth condition X-ray diffraction patterns showed that SBN films had well crystallized Bi-layered perovskite structure after $700^{\circ}C$ heat-treatment in furnace. From this specimen we got remnant polarization $(2P_r)$ of about 6 uC/$\textrm{cm}^2$ and coercive voltage $(V_c)$ of about 1.5 V at an applied voltage of 5 V. The leakage current density was $7.6{\times}10^{-7}$/A/$\textrm{cm}^2$ at an applied voltage of 5V. And for the NDRO-FRAM application, properties of SBN films on Si substrate has been investigated. From transmission electron microscopy (TEM) analysis, we found the furnace treated sample had a native oxide about 2 times thicker than the RTA treated sample and this thick native oxide layer had a bad effect on C-V characteristics of SBN/Si thin film. After $650^{\circ}C$ RTA process, we got the improved memory window of 1.3 V at an applied voltage of 5 V.