• 정보과학회 논문지
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• 제42권12호
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• pp.1623-1628
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• 2015

모바일 기기의 성능은 점진적으로 증가하여 멀티코어를 사용하는 고성능의 CPU를 장착한 스마트폰이 일상화 되었다. 그러나 고성능 기기가 사용하는 전력의 소모량을 배터리의 용량이 따라가지 못하므로 전력 관리를 위한 성능 제어가 필수적이 되었다. 이에 DVFS와 같은 Linux 기반의 전력 관리 방안이 연구되고 있으나, 동적으로 자원 요구량의 변화가 심하고 사용자의 입력이 불규칙적인 모바일 기기의 특성으로 인한 한계가 존재한다. 본 연구에서는 DVFS와 같은 기존 Linux 기반의 전력 관리 방안이 웹페이지 로딩에 있어 부족한 점을 보완하여 사용자 반응성을 유지하면서 전력 소모를 줄이는 방법으로 네트워크를 통해 연산에 필요한 데이터를 받을 때까지 CPU의 동작 Frequency을 제한하는 방안을 제안하였다. 또한, 어플리케이션 수준에서의 구현을 통하여 웹페이지 로딩 시의 전력 소모가 감소함을 확인하였다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 춘계학술대회
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• pp.143-146
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• 2011

본 논문은 1.2Vpp differential 입력 범위를 가지는 50-MS/s 10-hit pipelined ADC를 소개한다. 설계된 pipelined ADC는 8단의 1.5bit/stage, 1단의 2bit/stage와 digital correction 블록, bias circuit 및 reference driver, 그리고 clock generator로 구성된다. 1.5bit/stage는 sub-ADC, DAC, gain stage로 구성된다. 특히, 설계된 pipelined ADC에서는 hardware와 power consumption을 줄이기 위해 SHA를 제거하였으며, 전체 ADC의 dynamic performance를 향상시키기 위해 linearity가 개선된 bootstrapped switch를 사용하였다. Sub-ADC를 위한 reference 전압은 외부에서 인가하지 않고 on-chip reference driver에서 발생시킨다. 제안된 pipelined ADC는 1.8V supply, $0.18{\mu}m$ 1-poly 5-metal CMOS 공정에서 설계되었으며, power decoupling capacitor를 포함하여 $0.95mm^2$의 칩 면적을 가진다. 또한, 60mW의 전력소모를 가진다. 또한, Nyquist sampling rate에서 9.3-bit의 ENOB를 나타내었다.

• Architectural research
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• 제17권3호
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• pp.109-115
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• 2015

The dynamic pricing of electricity, where the electricity rate increases in a time zone with a high demand for electricity is typically applied to a building whose power reception capacity is greater than a certain size. This includes the time of use(TOU) electricity pricing in Korea which can induce the effect of reducing the power demand of a building. Meanwhile, a VRF (Variable Refrigerant Flow) system that uses electricity is regarded as one of the typical heating and cooling systems along with central air conditioning (central HVAC) for its easy operation and application to the building. Thus, to reduce power energy and operating costs of a building in which the TOU and VRF systems are applied simultaneously, we suggested a control for changing the indoor temperature setting within the thermal comfort range or limiting the rotational speed of an inverter compressor. In this study, to describe the features of the above-mentioned control and verify its effects, we evaluated the results obtained from the analysis of its operation data. Through the actual measurements in winter operations for 73 days since mid- December 2014, we confirmed a reduction of 10.9% in power energy consumption and 12.2% in operating costs by the new control. Also, a reduction of 13.3% in power energy consumption was identified through a regression analysis.

• 전기학회논문지P
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• 제67권4호
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• pp.208-213
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• 2018

In this paper, we studied the control strategy of applying STATCOM(static synchronous compensator) to mitigate the FIDVR(fault induced delayed voltage recovery) phenomenon. The proportion of motor loads is gradually increasing which might affect power system stability. Excessive reactive power consumption by the stall of the motor loads causes FIDVR phenomenon. In addition, the low inertia of the small HVAC(heating, ventilation and air conditioner) unit will not separate itself in the event of a contingency, causing system instability. For this reason, we have developed a control strategy that utilizes STATCOM efficiently through static and dynamic analysis. Case studies on a Korean power system have validated the performance of the proposed scheme under severe contingency scenarios. The results have verified that the proposed strategy can effectively mitigate FIDVR and improve the stability and reliability of the system.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제17권2호
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• pp.312-334
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• 2023

In large-scale computing, cloud computing plays an important role by sharing globally-distributed resources. The evolution of cloud has taken place in the development of data centers and numerous servers across the globe. But the cloud information centers incur huge operational costs, consume high electricity and emit tons of dioxides. It is possible for the cloud suppliers to leverage their resources and decrease the consumption of energy through various methods such as dynamic consolidation of Virtual Machines (VMs), by keeping idle nodes in sleep mode and mistreatment of live migration. But the performance may get affected in case of harsh consolidation of VMs. So, it is a desired trait to have associate degree energy-performance exchange without compromising the quality of service while at the same time reducing the power consumption. This research article details a number of novel algorithms that dynamically consolidate the VMs in cloud information centers. The primary objective of the study is to leverage the computing resources to its best and reduce the energy consumption way behind the Service Level Agreement (SLA)drawbacks relevant to CPU load, RAM capacity and information measure. The proposed VM consolidation Algorithm (PVMCA) is contained of four algorithms: over loaded host detection algorithm, VM selection algorithm, VM placement algorithm, and under loading host detection algorithm. PVMCA is dynamic because it uses dynamic thresholds instead of static thresholds values, which makes it suggestion for real, unpredictable workloads common in cloud data centers. Also, the Algorithms are adaptive because it inevitably adjusts its behavior based on the studies of historical data of host resource utilization for any application with diverse workload patterns. Finally, the proposed algorithm is online because the algorithms are achieved run time and make an action in response to each request. The proposed algorithms' efficiency was validated through different simulations of extensive nature. The output analysis depicts the projected algorithms scaled back the energy consumption up to some considerable level besides ensuring proper SLA. On the basis of the project algorithms, the energy consumption got reduced by 22% while there was an improvement observed in SLA up to 80% compared to other benchmark algorithms.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권10호
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• pp.5149-5167
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• 2017

Reducing energy consumption in a wireless video sensor network (WVSN) is a crucial problem because of the high video data volume and severe energy constraints of battery-powered WVSN nodes. In this paper, we present an adaptive dynamic resizing approach for a SRAM communication buffer in a WVSN node in order to reduce the energy consumption and thereby, to maximize the lifetime of the WVSN nodes. To reduce the power consumption of the communication part, which is typically the most energy-consuming component in the WVSN nodes, the radio needs to remain turned off during the data buffer-filling period as well as idle period. As the radio ON/OFF transition incurs extra energy consumption, we need to reduce the ON/OFF transition frequency, which requires a large-sized buffer. However, a large-sized SRAM buffer results in more energy consumption because SRAM power consumption is proportional to the memory size. We can dynamically adjust any active buffer memory size by utilizing a power-gating technique to reflect the optimal control on the buffer size. This paper aims at finding the optimal buffer size, based on the trade-off between the respective energy consumption ratios of the communication buffer and the radio part, respectively. We derive a formula showing the relationship between control variables, including active buffer size and total energy consumption, to mathematically determine the optimal buffer size for any given conditions to minimize total energy consumption. Simulation results show that the overall energy reduction, using our approach, is up to 40.48% (26.96% on average) compared to the conventional wireless communication scheme. In addition, the lifetime of the WVSN node has been extended by 22.17% on average, compared to the existing approaches.

• ETRI Journal
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• 제44권5호
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• pp.849-858
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• 2022

Dynamic voltage frequency scaling (DVFS) has been widely adopted for runtime power management of various processing units. In the case of neural processing units (NPUs), power management of neural network applications is required to adjust the frequency and voltage every layer to consider the power behavior and performance of each layer. Unfortunately, DVFS is inappropriate for layer-wise run-time power management of NPUs due to the long latency of voltage scaling compared with each layer execution time. Because the frequency scaling is fast enough to keep up with each layer, we propose a layerwise dynamic frequency scaling (DFS) technique for an NPU. Our proposed DFS exploits the highest frequency under the power limit of an NPU for each layer. To determine the highest allowable frequency, we build a power model to predict the power consumption of an NPU based on a real measurement on the fabricated NPU. Our evaluation results show that our proposed DFS improves frame per second (FPS) by 33% and saves energy by 14% on average, compared with DVFS.

• 한국산업정보학회논문지
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• 제17권4호
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• pp.17-23
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• 2012

초저전력 설계나 에너지 수확 활용은 동적 전력과 정적 전력 사이의 균형을 이루는 점에 근접하는 문턱전압이하의 매우 낮은 전압에서 작동하는 디지털 시스템을 요구한다. 이런 동작 모드에서 일반적인 논리회로의 지연 변화는 매우 크게 된다. 따라서, 본 논문에서 MOSFET 나노 공정기술에서 전력소비를 줄이면서 여러 가지 공정 변이의 영향을 받지 않는 비동기 방식의 NCL (Null conventional logic)을 사용한 저전력 논리회로 설계 방법을 제안하고자 한다. 제안된 NCL 회로는 45nm의 공정기술에서 0.4V의 공급전압을 사용하였고, 각 NCL회로는 속도와 전력에 의해서 일반적인 동기식 회로와 비교되었다.

• 대한전자공학회논문지SD
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• 제47권5호
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• pp.16-23
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• 2010

본 논문에서는 무선통신시스템의 수신단에 적용될 수 있는 6비트 250MS/s 플래쉬 A/D 변환기를 설계하였다. 제안하는 플래쉬 A/D 변환기는 기준 저항열에 입력전압범위 감지회로를 사용하여 비교기에서 소모하는 동적소비전력을 최소화 되게 설계하였다. 기존 플래시 A/D 변환기보다 아날로그단 소비전력은 4.3% 증가한 반면에, 디지털단 소비전력은 1/7로 감소하여 전체 소비전력은 1/2 정도로 감소하였다. 설계된 A/D 변환기는$0.18{\mu}m$ CMOS 1-poly 6-metal 공정으로 제작되었으며 측정 결과 입력 범위 0.8Vpp, 1.8V의 전원 전압에서 106mW의 전력소모를 나타내었다. 250MS/s의 변환속도와 30.27MHz의 입력주파수에서 4.1비트의 유효비트수를 나타내었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.688-696
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• 2014

A slew-rate control method of LCD driver ICs is introduced to increase uniformity between adjacent driver ICs and reduce power consumption. The slew rate of every voltage follower is calibrated by a feedback algorithm during the non-displaying period. Under normal operation mode, the slew rate is dynamically controlled for improving power efficiency. Experimental results show that the power consumption is reduced by 16% with a white pattern and by 10% with a black pattern, and display defects are successfully eliminated.