• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.248-248
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• 2010

CMOS 축소화가 32nm node를 넘어서 지속적으로 진행되기 위하여 FinFET, Surround Gate and Tri-Gate와 같은 Fully Depleted 3-Dimensional 소자들이 SCE를 다루기 위해서 많이 제안되어 왔다. 하지만 소자의 축소화를 진행함에 있어서 좁고 균일한 patterning을 형성하는 것과 동시에 낮은 Extension Region과 Contact Region에서의 Series Resistance을 제공하여야 하고 Source/Drain Contact Formation을 확보하여야 한다. 그리고 소자의 축소화가 진행됨으로써 Silicide의 응집현상과 Source/Drain Junction의 누설전류에 대한 허용범위가 점점 엄격해지고 있다. ITRS 2005에 따르면 32nm CMOS에서는 Contact Resistivity가 대략 $2{\times}10-8{\Omega}cm2$이 요구되고 있다. 또한 Three Dimensional 소자에서는 Fin Corner Effect가 Channel Region뿐만 아니라 S/D Region에서도 중대한 영향을 미치게 된다. 따라서 본 논문에서 제시하는 Novel S/D Contact Formation 기술을 이용하여 Self-Aligned Dual/Single Metal Contact을 이루어Patterning에 대한 문제점 해결과 축소화에 따라 증가하는 Contact Resistivity 문제점을 해결책을 제시하고자 한다. 이를 검증하기3D MOSFET제작하고 본 기술을 적용하고 검증한다. 또한 Normal Doping 구조를 가진3D MOSFET뿐만 아니라 SCE를 해결하기 위해서 대안으로 제시되고 있는 SB-MOSFET을 3D 구조로 제작하고, 이 기술을 적용하여 검증한다. 그리고 Silvaco simulation tool을 이용하여 S/D에 Metal이 Contact을 이루는 구조가 Double type과 Triple type에 따라 Contact Resistivity에 미치는 영향을 미리 확인하였고 이를 실험으로 검증하여 소자의 축소화에 따라 대두되는 문제점들의 해결책을 제시하고자 한다.

• Proceedings of the Korea Concrete Institute Conference
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• 2000.04a
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• pp.339-342
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• 2000

Recently, the importance of the conutermeasures for waste materials has pointed out. Waste glass is also one to waste materials used for the recycling in construction sites. The crushed waste glass has been used to make a glass polymer composite that can be applied for sewer, storm drain pipe and interlocking block, etc. In this study, the crushed waste glass is explored with the possibility of recycling it, as a substitute for fine aggregates. The prepose of this investigation is to improve the strengths and acid resistance of the UP mortars using crushed waste glass. The UP mortars are prepare with blast furnace slag fly ash filler. the UP-fine aggregate ratios the crushed waste glass replacements for fine aggregate are tested strengths before and after immersion(H (아래첨자2)SO(아래첨자4) 10%), weight change and acid resistance are also tested. From the test results, the relative strength or UP mortars using fly ash as filler are found to be somewhat superior to that of the UP mortars using blast furnace as filler, And a UP mortar with fly ash as a filler, a UP-fine aggregate ratio of 15% and a waste glass replacement if 50% for fine aggregate is recommended as optimal mix proportion of UP mortar using crushed waste glass. Accordingly, it is enough to assure the use of the crushed waare glass as an aggregate for the production of UP mortar.

• Journal of Electrical Engineering and Technology
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• v.9 no.3
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• pp.843-847
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• 2014

In Super Junction (SJ) MOSFETs, charge balance is the most important issue of the SJ fabrication process. In order to achieve the best electrical characteristics, such as breakdown voltage and on-resistance, the N-type and P-type drift regions must be fully depleted when the drain bias approaches the breakdown voltage, which is known as the charge balance condition. In conventional charge balance analysis, based on multi-epi process SJ MOSFETs, analytical model has only N, P pillar width and doping concentration parameter. But applying a conventional charge balance principle to trench filling process, easier than Multi-epi process, is impossible due to the missing of the trench angle parameter. To achieve much more superior characteristics of on-resistance in trench filling SJ MOFET, the appropriate trench angle is necessary. So in this paper, modulated charge balance analysis is proposed, in which a trench angle parameter is added. The proposed method is validated using the TCAD simulation tool.

• Journal of Surface Science and Engineering
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• v.49 no.2
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• pp.152-158
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• 2016

We investigated the effect of capacitively coupled Ar plasma treatment on contact resistance ($R_c$) and channel sheet resistance ($R_{sh}$) of graphene field effect transistors (FETs), by varying their channel length in the wide range from 200 nm to $50{\mu}m$ which formed the transfer length method (TLM) patterns. When the Ar plasma treatment was performed on the long channel ($10{\sim}50{\mu}m$) graphene FETs for 20 s, $R_c$ decreased from 2.4 to $1.15k{\Omega}{\cdot}{\mu}m$. It is understood that this improvement in $R_c$ is attributed to the formation of $sp^3$ bonds and dangling bonds by the plasma. However, when the channel length of the FETs decreased down to 200 nm, the drain current ($I_d$) decreased upon the plasma treatment because of the significant increase of channel $R_{sh}$ which was attributed to the atomic structural disorder induced by the plasma across the transfer length at the edge of the channel region. This study suggests a practical guideline to reduce $R_c$ using various plasma treatments for the $R_c$ sensitive graphene and other 2D material devices, where $R_c$ is traded off with $R_{sh}$.

• Journal of Industrial Technology
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• v.25 no.B
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• pp.63-71
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• 2005

This paper is an experimental result of investigating lateral soil movements at piled bridge abutments by using the centrifuge model facility. Three different centrifuge model experiments, changing the methods of ground improvement at bridge abutment on the soft clayey soil (no improvement, preconsolidation and plastic board drains (PBD), sand compaction pile (SCP) + PBD), were carried out to figure out which method is the most appropriate for resisting against the lateral soil movements. In the centrifuge modelling, construction process in field was reconstructed as close as possible. Displacements of abutment model, ground movement, vertical earth pressure, cone resistance after soil improvement and distribution of water content were monitored during and after centrifuge model tests. As results of centrifuge model experiments, preconsolidation method with PBD was found to be the most effective against the lateral soil movement by analyzing results about displacements of abutment model, ground movement and cone resistance. Increase of shear strength by preconsolidation method resulted in increasing the resistance against lateral soil movement effectively although SCP could mobilize the resistance against lateral soil movement. It was also found that installment with PBD beneath the backfill of bridge abutment induced effective drainage of excess pore water pressure during the consolidation by embanking at the back of the abutment and resulted in increasing the shear strength of clay soil foundation and eventually increasing the resistance of lateral soil movement against piles of bridge abutment.

• Journal of Plant Biotechnology
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• v.43 no.1
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• pp.99-103
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• 2016

In perennial ginseng plantations, the effective control of various diseases is one of the most critical factors for increasing yields. Enhancing the resistance to disease through induced systemic resistance (ISR) and anti-microbial activity of beneficial soil bacteria, is currently considered to be a potential promising approach to integrate pathogen management for sustainable agriculture. However, the effective in vitro culture systems for testing ISR in ginseng plants have been rarely reported. In this study, I have successfully developed an in vitro germ-free culture system of Panax ginseng seedling for diverse purposes. With this useful system, we also tested BTH-induced priming effects against Botrytis cinerea and Colletotrichum panacicola. Compared to the drain method for enhancing ISR effects to ginseng seedlings, the direct method of spraying leaves somewhat increased the defense activity to these major fungal pathogens. Consistently, the expression of pathogen related PgPR10 and PgCAT were greatly and rapidly enhanced in the BTH-treated ginseng seedlings by treatment with C. panacicola. Our results revealed that the in vitro culture system can be used for developing eco-friendly and versatile bio-control agents for harmful diseases in ginseng cultivation.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.193-198
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• 2007

The NiSi is very promising candidate for the metallization in 60nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process window temperature for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5{\Omega}/{\square}$ and $3{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.11a
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• pp.26.2-26.2
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• 2009

A simple route of externalmechanical force is presented for enhancing the electrical properties ofpolymer nanocomposite consisted of nanowires. By dispersing ZnO nanowires inpolymer solution and drop casting on substrates, nanocomposite transistorscontaining ZnO nanowires are successfully fabricated. Even though the ZnOnanowires density is properly controlled for device fabrication, as-cast devicedoesn't show any detectablecurrents, because nanowires are separated far from each other with theinsulating polymer matrix intervening between them. Compared to the devicepressed at 300 kPa, the device pressed at 600 kPa currents increased by 50times showing the linear behavior against drain voltage and exhibits promisingelectrical properties, which operates in the depletion mode with highermobility and on-current. Such an improved device performance would be realizedby the contacts improvement and the increase of the number of electrical pathinduced by external force. This approach provides a viable solution for seriouscontact resistance problem of nanocomposite materials and promises for futuremanufacturing of high-performance devices.

• Journal of Satellite, Information and Communications
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• v.11 no.4
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• pp.27-32
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• 2016

A conventional double diffused drain n-type MOSFET (DDD_NMOS) device shows SCR behaviors with very low snapback holding voltage and latch-up problem during normal operation. However, a modified DDD_NMOS-based silicon controlled rectifier (DDD_NSCR_CPS) device with a counter pocket source (CPS) structure is proven to increase the snapback holding voltage and on-resistance compare to standard DDD_NSCR device, realizing an excellent electrostatic discharge protection performance and the stable latch-up immunity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.10
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• pp.665-671
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• 2017

Herein, we report the fabrication of low-voltage N-type organic field-effect transistors by using high capacitance fluorinated polymer gate dielectrics such as P(VDF-TrFE), P(VDF-TrFE-CTFE), and P(VDF-TrFE-CFE). Electron-withdrawing functional groups in PVDF-based polymers typically cause the depletion of negative charge carriers and a high contact resistance in N-channel organic semiconductors. Therefore, we incorporated intermediate layers of a low-k polymerto prevent the formation of a direct interface between PVDF-based gate insulators and the semiconducting active layer. Consequently, electron depletion is inhibited, and the high charge resistance between the semiconductor and source/drain electrodes is remarkably improved by the in corporation of solution-processed charge injection layers.