• Title/Summary/Keyword: drain circuit noise

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LNA Design Uses Active and Passive Biasing Circuit to Achieve Simultaneous Low Input VSWR and Low Noise (낮은 입력 정재파비와 잡음을 갖는 수동 및 능동 바이어스를 사용한 저잡음증폭기에 관한 연구)

  • Jeon, Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.32 no.8
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    • pp.1263-1268
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    • 2008
  • In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

Balanced Buck-Boost Switching Converter to Reduce Common-Mode Conducted Noise

  • Shoyama Masahito;Ohba Masashi;Ninomiya Tamotsu
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.212-216
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    • 2001
  • Because conventional switching converters have been usually using unbalanced circuit topologies, parasitic capacitance between the drain/collector of an active switch and the frame ground through its heat sink may generate the common-mode conducted noise. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common-mode conducted noise. As an example, a boost converter version of the balanced switching converter was presented and the mechanism of the common-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switching converter circuit and presents a buck-boost converter version of the balanced switching converter. The feature of common-mode noise reduction is confirmed by experimental results and the mechanism of the common-mode noise reduction is explained using equivalent circuits.

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Balanced Buck-Boost Switching Converter to Reduce Commom-mode Conducted Noise

  • Shoyama, Masahito;Ohba, Masashi;Ninomiya, Tamotsu
    • Journal of Power Electronics
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    • v.2 no.2
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    • pp.139-145
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    • 2002
  • Because conventional switching converters have been usually using unbalanced circuit topologies, parasitice between the drain/collertor of an active switch and frame ground through its heat sink may generate the commom-mode conducted noise. We have proposed a balanced switching converter circuit, whitch is an effective way to reduce the commom-mode converter version of the balanced switching converter was presented and the mechanism of the commom-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switch converter circuit and presents a buck-boost converter version of the blanced switching converter. The feature of common-mode niose reduction is confirmed by experimental resuits and the mechanisem of the commom-mode niose reduction is explained using equivalent circuits.

Noise Analysis of Sub Quarter Micrometer AlGaN/GaN Microwave Power HEMT

  • Tyagi, Rajesh K.;Ahlawat, Anil;Pandey, Manoj;Pandey, Sujata
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.3
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    • pp.125-135
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    • 2009
  • An analytical 2-dimensional model to explain the small signal and noise properties of an AlGaN/GaN modulation doped field effect transistor has been developed. The model is based on the solution of two-dimensional Poisson's equation. The developed model explains the influence of Noise in ohmic region (Johnson noise or Thermal noise) as well as in saturated region (spontaneous generation of dipole layers in the saturated region). Small signal parameters are obtained and are used to calculate the different noise parameters. All the results have been compared with the experimental data and show an excellent agreement and the validity of our model.

A Scalable Bias-dependent P-HEMT Noise Model with Single Drain Current Noise Source (드레인 전류 잡음원만을 고려한 스케일링이 가능한 바이어스 의존 P-HEMT 잡음모델)

  • 윤경식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.10A
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    • pp.1579-1587
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    • 1999
  • Bias-dependent noise models of $0.2\mu\textrm{m}$ gate length P-HEMT's which are scalable with gate width are proposed. To predict S-parameters of the P-HEMT's the intrinsic parameters except for $\tau$ subtracted the offsets introduced in this paper are normalized to the gate width and then scaled. The small-signal model parameters are expressed as fitting functions of the drain current to $\textrm{I}_{dss}$ ratio and gate width. In addition, to estimate accurately noise parameters the noise temperature $\textrm{T}_{g}$ of the intrinsic resistance, the equivalent noise conductance $\textrm{G}_{ni}$ of the gate current noise source, and the equivalent noise conductance $\textrm{G}_{no}$ of the drain current noise source are adopted as the noise model parameters. The extracted values of $\textrm{T}_{g}$ are nearly independent of drain current and gate width and their average is around the ambient temperature. The extracted values of $\textrm{G}_{ni}$ are small enough to be neglected to the circuit characteristics. From the comparison of the noise model with only $\textrm{G}_{no}$ and that having $\textrm{T}_{g}$, $\textrm{G}_{ni}$ and $\textrm{G}_{no}$ to the measured data it is fund that even the former model is in good agreement with the measured noise parameters. Thus, from a practical point of view the noise model having only the drain current noise source is confirmed as a scalable bias-dependent model.

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A Study on Design and Implementation of Low Noise Amplifier for Satellite Digital Audio Broadcasting Receiver (위성 DAB 수신을 위한 저잡음 증폭기의 설계 및 구현에 관한 연구)

  • Jeon, Joong-Sung;You, Jae-Hwan
    • Journal of Navigation and Port Research
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    • v.28 no.3
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    • pp.213-219
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    • 2004
  • In this paper, a LNA(Low Noise Amplifier) has been developed, which is operating at L-band i.e., 1452∼1492 MHz for satellite DAB(Digital Audio Brcadcasting) receiver. The LNA is designed to improve input and output reflection coefficient and VSWR(Voltage Standing Wave Ratio) by balanced amplifier. The LNA consists of low noise amplification stage and gain amplification stage, which make a using of GaAs FET ATF-10136 and VNA-25 respectively, and is fabricated by hybrid method. To supply most suitable voltage and current, active bias circuit is designed Active biasing offers the advantage that variations in $V_P$ and $I_{DSS}$ will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets $V_{gs}$ for the desired drain voltage and drain current. The LNA is fabricated on FR-4 substrate with RF circuit and bias circuit, and integrated in aluminum housing. As a reults, the characteristics of the LNA implemented more than 32 dB in gain. 0.2 dB in gain flatness. lower than 0.95 dB in noise figure, 1.28 and 1.43 each input and output VSWR, and -13 dBm in $P_{1dB}$.

Noise Modeling of Gate Leakage Current in Nanoscale MOSFETs (나노 MOSFETs의 게이트 누설 전류 노이즈 모델링)

  • Lee, Jonghwan
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.3
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    • pp.73-76
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    • 2020
  • The physics-based compact gate leakage current noise models in nanoscale MOSFETs are developed in such a way that the models incorporate important physical effects and are suitable for circuit simulators, including QM (quantum-mechanical) effects. An emphasis on the trap-related parameters of noise models is laid to make the models adaptable to the variations in different process technologies and to make its parameters easily extractable from measured data. With the help of an accurate and generally applicable compact noise models, the compact noise models are successfully implemented into BSIM (Berkeley Short-channel IGFET Model) format. It is shown that the noise models have good agreement with measurements over the frequency, gate-source and drain-source bias ranges.

Design of a Frequency Oscillator Using A Novel DGS (새로운 DGS 구조를 이용한 주파수 발진기 설계)

  • Joung, Myung-Sup;Kim, Jong-Ok;Park, Jun-Seok;Lim, Jae-Bong;Cho, Hong-Goo
    • Proceedings of the KIEE Conference
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    • 2003.07c
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    • pp.1955-1957
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    • 2003
  • This paper presents a novel defected ground structure (DGS) and its application to a microwave oscillator. The presented oscillator is designed so as to use the suggested defected ground structure as a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM calculations and simple circuit analysis method. The implemented 1.07 GHz oscillator exhibits 0 dBm output power with over 15% dc-to-RF power efficiency and -106 dBc/Hz phase noise at 100 kHz offset from carrier.

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A Study on the Design of a Beta Ray Sensor Reducing Digital Switching Noise (디지털 스위칭 노이즈를 감소시킨 베타선 센서 설계)

  • Kim, Young-Hee;Jin, Hong-Zhou;Cha, Jin-Sol;Hwang, Chang-Yoon;Lee, Dong-Hyeon;Salman, R.M.;Park, Kyung-Hwan;Kim, Jong-Bum;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.5
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    • pp.403-411
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    • 2020
  • Since the analog circuit of the beta ray sensor circuit for the true random number generator and the power and ground line used in the comparator circuit are shared with each other, the power generated by the digital switching of the comparator circuit and the voltage drop at the ground line was the cause of the decreasein the output signal voltage drop at the analog circuit including CSA (Charge Sensitive Amplifier). Therefore, in this paper, the output signal voltage of the analog circuit including the CSAcircuit is reduced by separating the power and ground line used in the comparator circuit, which is the source of digital switching noise, from the power and ground line of the analog circuit. In addition, in the voltage-to-voltage converter circuit that converts VREF (=1.195V) voltage to VREF_VCOM and VREF_VTHR voltage, there was a problem that the VREF_VCOM and VREF_VTHR voltages decrease because the driving current flowing through each current mirror varies due to channel length modulation effect at a high voltage VDD of 5.5V when the drain voltage of the PMOS current mirror is different when driving the IREF through the PMOS current mirror. Therefore, in this paper, since the PMOS diode is added to the PMOS current mirror of the voltage-to-voltage converter circuit, the voltages of VREF_VCOM and VREF_VTHR do not go down at a high voltage of 5.5V.

Analysis of Tank Oscillation Voltages of Sub-1V Series Tuned Varactor-Incorporating Balanced Common-Gate and Common-Drain Colpitts-VCO (서브-1V 직렬공진 바렉터 통합형 평형 공통 게이트와 공통 드레인 콜피츠 전압제어 발진기의 탱크 발진전압에 대한 해석)

  • Jeon, Man-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.7
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    • pp.761-766
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    • 2014
  • This study performs the analytical investigation of the oscillation voltages at the tanks of the series tuned varactor incorporating balanced common-drain, and common-gate Colpitts VCO which are able to work even at the sub-1V power supply voltages. The results the investigation predicts is verified by the simulation on the circuit behaviors of the two VCOs. The analytical investigation finds that the series tuned varactor incorporating balanced common-gate VCO generates greater oscillation voltage at the tank than the series tuned varactor incorporating balanced common-drain VCO does, which in turn is more suitable for generating the low phase noise oscillation signal from the sub-1V supply voltage than the series tuned varactor incorporating balanced common-drain VCO.