• Title/Summary/Keyword: double capacitor

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Characterization of Electric Double-Layer Capacitors with Carbon Nanotubes Directly Synthesized on a Copper Plate as a Current Collector (구리 집전판에 직접 합성한 탄소나노튜브의 전기이중층 커패시터 특성)

  • Jung, Dong-Won;Lee, Chang-Soo;Park, Soon;Oh, Eun-Souk
    • Korean Journal of Metals and Materials
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    • v.49 no.5
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    • pp.419-424
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    • 2011
  • Carbon nanotubes (CNTs) were directly synthesized on a copper (Cu) plate as a current collector by the catalytic thermal vapor deposition method for an electric double-layer capacitor (EDLC) electrode. The diameters of vertically aligned CNTs grown on the Cu plate were 20~30 nm. From cyclic voltammetry (CV) results, the CNTs/Cu electrode showed high specific capacitance with typical profiles of EDLCs. Rectangularshaped CV curves suggested that the CNTs/Cu electrode could be an excellent candidate for an EDLC electrode. The specific capacitances were in a range of 25~75 F/g with a scan rate of 10~100 mV/s and KOH electrolyte concentration 1~6 M, and were maintained up to 1000 charge/discharge cycles due to strong adhesion between the Cu substrate and the CNTs.

Activated carbons prepared from mixtures of coal tar pitch and petroleum pitch and their electrochemical performance as electrode materials for electric double-layer capacitor

  • Lee, Eunji;Kwon, Soon Hyung;Choi, Poo Reum;Jung, Ji Chul;Kim, Myung-Soo
    • Carbon letters
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    • v.16 no.2
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    • pp.78-85
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    • 2015
  • Activated carbons (ACs) were prepared by activation of coal tar pitch (CTP) in the range of $700^{\circ}C-1000^{\circ}C$ for 1-4 h using potassium hydroxide (KOH) powder as the activation agent. The optimal activation conditions were determined to be a CTP/KOH ratio of 1:4, activation temperature of $900^{\circ}C$, and activation time of 3 h. The obtained ACs showed increased pore size distribution in the range of 1 to 2 nm and the highest specific capacitance of 122 F/g in a two-electrode system with an organic electrolyte, as measured by a charge-discharge method in the voltage range of 0-2.7 V. In order to improve the performance of the electric double-layer capacitor electrode, various mixtures of CTP and petroleum pitch (PP) were activated at the optimal activation conditions previously determined for CTP. Although the specific capacitance of AC electrodes prepared from CTP only and the mixtures of CTP and PP was not significantly different at a current density of 1 A/g, the AC electrodes from CTP and PP mixtures showed outstanding specific capacitance at higher current rates. In particular, CTP-PP61 (6:1 mixture) had the highest specific capacitance of 132 F/g, and the specific capacitance remained above 90% at a high current density of 3 A/g. It was found that the high specific capacitance could be attributed to the increased micro-pore volume of ACs with pore sizes from 1 to 2 nm, and the high power density could be attributed to the increased meso-pore volume.

Bidirectional Charging/Discharging Digital Control System for Eco-friendly Capacitor Energy Storage Device Implemented by TMS320F28335 chip (TMS320F28335로 구현한 친환경 커패시터 전력저장장치의 양방향 디지털 제어 충/방전 시스템)

  • Lee, Jung-Im;Lee, Jong-Hyun;Jung, An-Yoel;Lee, Choon-Ho;Park, Joung-Hu;Jeon, Hee-Jong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.3
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    • pp.188-198
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    • 2010
  • Recently, as the demand of the environmental-friendly energy storage system such as an electric double-layer condenser increases, that of the bidirectional charger/discharger for the systems also increases. However, when charging/discharging mode-change occurs, the charger/discharger employing a bi-directional DC-DC converter with a commercialized analog controller has a complex circuit scheme, and a poor transient response. On the other hand, if a single digital controller is used for the bi-directional mode, the system performances can be improved by application of an advanced power-processing algorithm. In the paper, an environmental-friendly power storage systems including an Electric Double Layer Capacitor(EDLC) banks were developed with a bi-directional buck-boost converter and a digital signal processor (TMS320F28335). A simulation test-bed was realized and tested by MATLAB Simulink, and the hardware experiment was performed which shows that the dynamic response was improved such as the simulation results.

Fabrication and Electrochemical Characterization of N/S co-doped Carbon Felts for Electric Double-Layer Capacitors (전기이중층 커패시터용 질소/황이 동시에 도핑된 탄소 펠트의 제조 및 전기화학적 성능 평가)

  • Lee, Byoung-Min;Yun, Je Moon;Choi, Jae-Hak
    • Korean Journal of Materials Research
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    • v.32 no.5
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    • pp.270-279
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    • 2022
  • In this study, N/S co-doped carbon felt (N/S-CF) was prepared and characterized as an electrode material for electric double-layer capacitors (EDLCs). A commercial carbon felt (CF) was immersed in an aqueous solution of thiourea and then thermally treated at 800 ℃ under an inert atmosphere. The prepared N/S-CF showed a large specific surface area with hierarchical pore structures. The electrochemical performance of the N/S-CF-based electrode was evaluated using both 3-electrode and 2-electrode systems. In the 3-electrode system, the N/S-CF-based electrode showed a good specific capacitance of 177 F/g at 1 A/g and a good rate capability of 41% at 20 A/g. In the 2-electrode system (symmetric capacitor), the freestanding N/S-CF-based electrode showed a specific capacitance of 275 mF/cm2 at 2 mA/cm2, a rate capability of 62.5 % at 100 mA/cm2, a specific power density of ~ 25,000 mW/cm2 at an energy density of 23.9 mWh/cm2, and a cycling stability of ~ 100 % at 100 mA/cm2 after 20,000 cycles. These results indicate the N/S co-doped carbon felts can be a promising candidate as a new electrode material in a symmetric capacitor.

A Topological Transformation and Hierarchical Compensation Capacitor Control in Segmented On-road Charging System for Electrical Vehicles

  • Liu, Han;Tan, Linlin;Huang, Xueliang;Guo, Jinpeng;Yan, Changxin;Wang, Wei
    • Journal of Power Electronics
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    • v.16 no.4
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    • pp.1621-1628
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    • 2016
  • Experiencing power declines when the secondary coil is at the middle position between two primary coils is a serious problem in segmented on-road charging systems with a single energized segmented primary coil. In this paper, the topological transformation of a primary circuit and a hierarchical compensation capacitor control are proposed. Firstly, the corresponding compensation capacitors and receiving powers of different primary structures are deduced under the condition of a fixed frequency. Then the receiving power characteristics as a function of the position variations in systems with a single energized segmented primary coil and those with double segmented primary coils are analyzed comparatively. A topological transformation of the primary circuit and hierarchical compensation capacitor control are further introduced to solve the foregoing problem. Finally, an experimental prototype with the proposed topological transformation and hierarchical compensation capacitor control is carried out. Measured results show that the receiving power is a lot more stable in the movement of the secondary coil. It is a remarkable fact that the receiving power rises from 10.8W to 19.2W at the middle position between the two primary coils. The experimental are in agreement with the theoretical analysis.

Modeling, Analysis, and Enhanced Control of Modular Multilevel Converters with Asymmetric Arm Impedance for HVDC Applications

  • Dong, Peng;Lyu, Jing;Cai, Xu
    • Journal of Power Electronics
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    • v.18 no.6
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    • pp.1683-1696
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    • 2018
  • Under the conventional control strategy, the asymmetry of arm impedances may result in the poor operating performance of modular multilevel converters (MMCs). For example, fundamental frequency oscillation and double frequency components may occur in the dc and ac sides, respectively; and submodule (SM) capacitor voltages among the arms may not be balanced. This study presents an enhanced control strategy to deal with these problems. A mathematical model of an MMC with asymmetric arm impedance is first established. The causes for the above phenomena are analyzed on the basis of the model. Subsequently, an enhanced current control with five integrated proportional integral resonant regulators is designed to protect the ac and dc terminal behavior of converters from asymmetric arm impedances. Furthermore, an enhanced capacitor voltage control is designed to balance the capacitor voltage among the arms with high efficiency and to decouple the ac side control, dc side control, and capacitor voltage balance control among the arms. The accuracy of the theoretical analysis and the effectiveness of the proposed enhanced control strategy are verified through simulation and experimental results.

Design of a Comparator with Improved Noise and Delay for a CMOS Single-Slope ADC with Dual CDS Scheme (Dual CDS를 수행하는 CMOS 단일 슬로프 ADC를 위한 개선된 잡음 및 지연시간을 가지는 비교기 설계)

  • Heon-Bin Jang;Jimin Cheon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.6
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    • pp.465-471
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    • 2023
  • This paper proposes a comparator structure that improves the noise and output delay of a single-slope ADC(SS-ADC) used in CMOS Image Sensor (CIS). To improve the noise and delay characteristics of the output, a comparator structure using the miller effect is designed by inserting a capacitor between the output node of the first stage and the output node of the second stage of the comparator. The proposed comparator structure improves the noise, delay of the output, and layout area by using a small capacitor. The CDS counter used in the single slop ADC is designed using a T-filp flop and bitwise inversion circuit, which improves power consumption and speed. The single-slope ADC also performs dual CDS, which combines analog correlated double sampling (CDS) and digital CDS. By performing dual CDS, image quality is improved by reducing fixed pattern noise (FPN), reset noise, and ADC error. The single-slope ADC with the proposed comparator structure is designed in a 0.18-㎛ CMOS process.

EnhAnced Electric Double Layer Capacitance of New Poly Sodium 4-tyrenesulfonate Intercalated Graphene Oxide Electrodes

  • Jeong, Hye-Gyeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.287.2-287.2
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    • 2013
  • We synthesized a new composite of poly sodium 4-styrenesulfonate intercalated graphene oxide for energy storage devices by controlling oxidation time in the synthesis of graphite oxide. Specific capacitance was improved from 20 F/g of the previous composites to 88 F/g of the new composite at the current density of 0.3 A/g. The capacitance retention was 94% after 3000 cycles, indicating that the new composites of high cyclic stability, prominent performance as electric double layer capacitor, and even low resistance could be an excellent carbon based electrode for further energy storage devices.

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Symmetrical Scanning Leaky Wave Antenaa Using Double Negative and Double Positive Transmission Line (Double Negative, Positive 전승 선로를 이용한 대칭적적인 주파수 스캐닝 누설파 안테나)

  • 이재곤;이정해
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.11
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    • pp.1069-1074
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    • 2004
  • In this paper, we have designed artificial double negative(DNG) transmission line composed of series inter-digital capacitor and two shunt inductive short stubs. This artificial DNG transmission line has the property of double positive (DPS) transmission line over some frequency ranges due to RF nature. In detail, this transmission line simultaneously has the contrary properties of DNG and DPS transmission line depending on operation frequency. DPS/DNG transmission line at leaky region is utilized to design frequency scanning antenna with backfire-to-endfire. We have simulated and measured the dispersion and for-field radiation beam patterns of symmetrical leaky wave antenna. The results show rough agreement.

Single Phase SRM Converter with Boost Negative Bias (부스트 Negative Bias를 가지는 단상 SRM 컨버터)

  • Liang, Jianing;Seok, Seung-Hun;Lee, Dong-Hee;Ahn, Jin-Woo
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.879-880
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    • 2008
  • At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

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