• 반도체디스플레이기술학회지
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• 제21권1호
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• pp.62-66
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• 2022

Semiconductor is one of the most internationally competitive areas among domestic industries, the major concern of which is the stability of the wafer manufacturing processes. The packaging process is the final step in wafer manufacturing. Problems in the wafer packaging process cause large losses. The vibrations are supposed to be the most important factors for the packaging quality. In this study, the structure of a packaging box was analyzed through experiments and computer simulations, and further the effects of design alterations to suppress the vibrations have been investigated. The final result shows that the vibrations can be reduced substantially to improve the stability of the structure.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.103-106
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• 1999

In this paper, we suggest the FED packaging technology that have 4mm thickness, using sodalime glass-to-sodalime glass electrostatic bonding. It based on conventional silicon-glass bonding. The silicon film was deposited an around the exhausting hole on FED backside panel. And then, the silicon film of panel was successfully bonded with capping(bare) glass in vacuum environment and the FED panel was vacuum-sealed. In this method, we could achieve more 153 times increased conductance and 200 times increased vacuum efficiency than conventional tube packaging method. The vacuum level in panel, by SRG test, was maintained about low 10$_{-4}$ Torr during above two months And, the light emission was observed to 0.7-inch tubeless packaged FED. Then anode current was 34 $\mu$ A. Emission stability was constantly measured for 10 days.

• Journal of Information Display
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• 제2권4호
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• pp.34-38
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• 2001

We suggested new PDP packaging technology using the direct joint method, which does not need an exhausting hole and tube. The advantages of this method are simple process, short process time and time panel package. To packaging, we drew the seal line of glass frit by dispenser followed by forming the lump, which provide pumping-out path during the packaging process. And, we have performed a pretreatment of glass frit to reduce the out-gases. After which, both front and rear glass plates were aligned and loaded into vacuum packaging chamber. The 4-inch monochrome AC-PDP was successfully packaged and fully emitted with brightness of 1000 $cd/m^2$. Also, glass frit properties for pretreatment condition was investigated by AES and SEM analyses.

• 반도체디스플레이기술학회지
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• 제19권2호
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• pp.105-109
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• 2020

Today's placement machines can pick and place thousands of components per hour with a very high degree of accuracy. The packaged semiconductor chips are inserted into a carrier at regular intervals, covered with a tape to protect the chips from external impact, and supplied in a roll form. These packaging processes also progress rapidly in a consistent direction, affecting the peelback strength between the cover tape and carrier depending on the main process conditions. In this paper, we analyzed the main process variables that affect peelback strength in the reel tape packaging process for packaging semiconductor chips. The main effects and interactions were analyzed. The peelback strength range required in the packaging process was set as the nominal the best characteristics, and the optimum process condition satisfying this was derived.

• E2M - 전기 전자와 첨단 소재
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• 제10권6호
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• pp.608-625
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• 1997

• 반도체디스플레이기술학회지
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• 제14권3호
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• pp.13-22
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• 2015

LED (Light Emitting Diode) lighting is gaining more and more market penetration as one of the global warming countermeasures. LED is the next generation of fusion source composed of epi/chip/packaging of semiconductor process technology and optical/information/communication technology. LED has been applied to the existing industry areas, for example, automobiles, TVs, smartphones, laptops, refrigerators and street lamps. Therefore, LED makers have been striving to achieve the leading position in the global competition through development of core source technologies even before the promotion and adoption of LED technology as the next generation growth engine with eco-friendly characteristics. However, there has been a point of view on the cost compared to conventional lighting as a large obstacle to market penetration of LED. Therefore, companies are developing a Chip-Scale Packaging (CSP) LED technology to improve performance and reduce manufacturing costs. In this study, we perform patent analysis associated with Flip-Chip CSP LED and flow chart for promising technology forecasting. Based on our analysis, we select key patents and key patent players to derive the business strategy for the business success of Flip-Chip CSP PKG LED products.

• 한국포장학회지
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• 제24권2호
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• pp.73-84
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• 2018

This study sought efficiency of collaboration between manufacturers and distributors by finding a way to improve logistics efficiency in order to save distribution cost and standardize packaging together with profit generation by way of simple-display packaging in discount stores. For the study purpose, the impact of products with RRP (Retail Ready Packaging) by each discount store on the collaboration achievement such as loading efficiency was observed. From this observation, an alternative packaging system that can improve logistics efficiency between manufacturers and distributors was sought and the role of distributors in distribution standardization was explored. The purpose of this study also includes suggesting some implications on future basic direction of environment-friendly management. If this study would induce distributors to have more interest in distribution standardization and if logistics efficiency would be enhanced by the operation of packaging system considered of compatibility with pallets, this study would have academic significance and create practical values.

• 마이크로전자및패키징학회지
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• 제22권1호
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• pp.7-14
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• 2015

Recently, advances in nano-material researches have opened the door for various transparent conductive materials, which include carbon nanotube, graphene, Ag and Cu nanowire, and printable metal grids. Among them, Ag nanowires are particularly interesting to synthesize because bulk Ag exhibits the highest electrical conductivity among all metals. Here we reviewed recently-published research works introducing various devices from organic light emitting diode to tactile sensing devices, all of which are employing AgNW for a conducting material. They proposed methods to enhance the stretchability and reversibility of the transparent electrodes, and apply them to make various flexible and stretchable electronics. It is expected that Ag nanowires are applicable to a wide range of high-performance, low-cost, stretchable electronic devices.

• 반도체디스플레이기술학회지
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• 제1권1호
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• pp.15-19
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• 2002

A new vacuum packaging process in wafer level is developed for the surface micromachining devices using glass silicon anodic bonding technology. The inside pressure of the packaged device was measured indirectly by the quality factor of the mechanical resonator. The measured Q factor was about 5$\times10^4$ and the estimated inner pressure was about 1 mTorr. And it is also possible to change the inside pressure of the packaged devices from 2 Torr to 1 mTorr by varying the amount of the Ti gettering material. The long-term stability test is still on the way, but in initial characterization, the yield is about 80% and the vacuum degradation with time was not observed.

• 마이크로전자및패키징학회지
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• 제6권4호
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• pp.35-39
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• 1999

The $Li_2O-MgO-MgF_2-SiO_2$glasses with addition of $B_2O_3$ were investigated in order to make glass-ceramics for low temperature firing substrate. Glasses were made by melting at $1450^{\circ}C$ in the electronic furnace and crystallized at $750^{\circ}C$. The crystal phases were polycrystalline of lithium boron fluorphlogopite and lithium fluorhectorite. The crystal shape was chanced to granule type from needle type with increasing $B_2O_3$ content. Average particle size of the glass-ceramics after water swelling was 3.77$\mu\textrm{m}$. The optimum sintering temperature and sintering shrinkage of the substrate were $900^{\circ}C$ and 13.4%, respectively.