• Title/Summary/Keyword: discrete delay

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A generalized disturbance observer theory and application to control of the GoldStar DD robot arm

  • Koh, Kwang-Ill;Lim, Kye-Young;Kang, Sung-Soo;Chae, Ho-Hyun
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10b
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    • pp.878-883
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    • 1990
  • There have been many approaches to solve the disturbance rejection problem in the control of LTI systems with state independent disturbances or possibly nonlinear state dependent disturbances. From the view point of each actuator, robot manipulators can be modeled as the second class of systems. With this model, M.Nakao et al. [1] introduced a decentralized control scheme based on interference estimation which is simple in its implementation and robust to the coupled dynamics and parameter variations. This paper systematically generalizes the control scheme to arbitrary finite dimensional LTI systems with disturbances. In doing so, we develop a disturbance observer theory for solving the disturbance rejection problem. We also present a discrete version of the theory with discussion of sampling and time-delay effects.

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The FPGA Implementation of Wavelet Transform Chip using Daubechies′4 Tap Filter for DSP Application

  • Jeong, Chang-Soo;Kim, Nam-Young
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.376-379
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    • 1999
  • The wavelet transform chip is implemented with Daubechies' 4 tap filter. It works at 20MHz in Field Programmable Gate array (FPGA) implementation of Quadrature Mirror Filter(QMF) Lattice Structure. In this paper, the structure contains taro-channel quadrature mirror filter, data format converter(DFC), delay control unit(DCU), and three 20$\times$8 bits real multiplier. The structures for the DFC and DCU need to he regular and scalable, require minimum number of regular, and thereby lead to an efficient and scalable architecture for the Discrete Wavelet Transform(DWT). These results present the possibility that it can be used in Digital Signal Processing(DSP) application faster than Fourier transform at small area with lour cost.

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Decentralized fuzzy output feedback controller for discrete time nonlinear interconnected system with time delay (시간 지연을 가지는 이산 시간 비선형 상호 결합 시스템의 분산 퍼지 출력 궤환 제어기 설계)

  • Koo, Geun-Bum;Joo, Young-Hoon;Park, Jin-Bae
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1781-1782
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    • 2008
  • 본 논문은 시간 지연을 가지는 이산 시간 비선형 상호 결합 시스템의 분산 퍼지 출력 궤환 제어기의 설계에 대해 연구한다. T-S(Takagi-Sugeno) 퍼지 모델 기법을 이용하여 퍼지 상호 결합 시스템을 구한다. 이를 바탕으로 분산 퍼지 출력 궤환 제어기를 설계하고, 폐루프 시스템의 안정도 충분 조건을 선형 행렬 부등식 (LMI)의 형태로 나타낸다. 설계된 이득값을 통하여 상호 결합 시스템이 안정화됨을 모의실험을 통하여 보인다.

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ANALYSIS OF A STAGE-STRUCTURED PREDATOR-PREY SYSTEM WITH IMPULSIVE PERTURBATIONS AND TIME DELAYS

  • Song, Xinyu;Li, Senlin;Li, An
    • Journal of the Korean Mathematical Society
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    • v.46 no.1
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    • pp.71-82
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    • 2009
  • In this paper, a stage-structured predator-prey system with impulsive perturbations and time delays is presented to investigate the ecological problem of how a pest population and natural enemy population can coexist. Sufficient conditions are obtained using a discrete dynamical system determined by a stroboscopic map, which guarantee that a 'predator-extinction' periodic solution is globally attractive. When the impulsive period is longer than some time threshold or the impulsive harvesting rate is below a control threshold, the system is permanent. Our results provide some reasonable suggestions for pest management.

T-S Fuzzy Controller for Discrete Nonlinear Systems with neutral type time-delays (뉴트럴 시간 시간을 포함하는 이산 비선형 시스템의 퍼지 제어기 설계)

  • Song, Min-Guk;Park, Jin-Bae;Ju, Yeong-Hun
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2008.04a
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    • pp.392-395
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    • 2008
  • 본 논문은 퍼지 제어기를 이용하여 이산 비선형 뉴트럴 시스템을 안정화 시킨다. 시간 지연을 가지는 이산 비선형 모델에 퍼지 제어기를 연결하여 폐회로를 구성하고, 이에 대한 안정도 분석 및 성능 평가에 대해 연구한다. 이산 비선형 시스템을 먼저 T-S 퍼지모델로 모델링 하고, 모델링된 시스템을 안정화 시키기 위한 제어기를 설계한다. 퍼지 모델과 퍼지 제어기 모두 같은 멤버쉽 함수를 가진다고 가정하며, 제어기 이득값 설계를 위한 선형 행렬 부등식 조건을 유도한다. 모의 실험을 통하여 제안된 제어기의 안정도를 입증한다.

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A Zipper-based VDSL Modem with an Efficient Cyclic Extension (효율적 Cyclinc Extension을 갖는 Zipperqkdtlr의 VDSL 모뎀)

  • 위정욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10B
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    • pp.1793-1802
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    • 2000
  • In this paper we propose an efficient implementation technique for cyclic extension in VDSL(Very High bit-rate Digital Subscriber Line) systems using Zipper duplexing and analyze its performances under typical telephone channel environments. In Zipper-based VDSL systems each DTM(discrete-multitone) block is appended by both cyclic prefix(CP) and cyclic suffix(CS). The CP is inserte to prevent both intersymbol interference (ISI) and iterchannel interference (ICI) while the CS is appended to ensure orthogonality between the upstream and downstream carriers thus preventing near-end crosstalk (NEXT). However in order to implement the CP in the transmitter side of the VDSL system an additional hardware is required to append the latter part of each DMT symbol to the beginning of the DMT symbol. In this paper we propose a VDSL system with Zipper duplexing using only CS to reduce hardware complexity (memory and processing delay) required for implementation of CP. It is shown by computer simulation that the proposed approach has the same capacity under typical channel environments as the previous Zipper-based VDSL system using both CP and CS. even with a significantly lower hardware complexity.

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A fast exponentiation with sparse prime (Sparse 소수를 사용한 효과적인 지수연산)

  • 고재영;박봉주;김인중
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.4
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    • pp.1024-1034
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    • 1998
  • Most public cryptosystem widely used in communication network are based on the exponentiation-arithmetic. But, cryptosystem has to use bigger and bigger key parameter to attain an adequate level of security. This situation increases both computation and time delay. Montgomery, yang and Kawamura presented a method by using the pre-computation, intermediately computing and table look-up on modular reduction. Coster, Brickel and Lee persented also a method by using the pre-computation on exponentiation. This paper propose to reduce computation of exponentiation with spare prime. This method is to enhance computation efficiency in cryptosystem used discrete logarithms.

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A state estimator design for servo system with delayed input (지연입력을 가진 서보시스템의 상태추정자 설계)

  • Kong, Jeong-Ja;Huh, Uk-Youl;Jeong, Kab-Kyun
    • Proceedings of the KIEE Conference
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    • 1998.07b
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    • pp.537-540
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    • 1998
  • This thesis deals with the design problem of the state estimator for digital servo system. Digital servo system has input time delay, which depends on the size of control algorithm. The delayed input is a factor that brings out the state estimation error. So, in order to reduce this state estimation error of the system, we proposes a state estimator in which the delayed input of the system is considered. At first, a discrete-time state-space model is established accounting for the delayed input. Next, the state estimator is designed based on this model. we employ Kalman filter algorithm in design of the state estimator. The performance of proposed state estimator is exemplified via some simulations and experiment for servo system. And robustness of the proposed estimator to modelling error by variation of the system parameter is also shown in these simulations.

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Kalman Filter Based Optimal Controllers in Free Space Optics Communication

  • Li, Zhaokun;Zhao, Xiaohui
    • Journal of the Optical Society of Korea
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    • v.20 no.3
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    • pp.368-380
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    • 2016
  • There is no doubt that adaptive optics (AO) is the most promising method to compensate wavefront disturbance in free space optics communication (FSO). In order to improve the performance of the AO system described by discrete-time linear system model with time-delay and implicit phase turbulent model, new controllers based on a Kalman filter and its extensions are proposed. Based on the standard Kalman filter, we propose a fading memory filter to deal with the ruleless strong interference; sequential and U-D filters are applied to reduce implementation complexity for the embedded controllers. Theoretical analysis and the numerical simulations show that the proposed fading memory filter can upgrade the performance for AO systems in consideration of the unforeseen strong pulse interference, and the sequential and U-D filters perform well compared with a Kalman filter.

Performance Analysis of an ATM-LAN IWU with a Dynamic Bandwidth Allocation Scheme

  • Park, Chul-Geun;Han, Dong-Hwan;Baik, Kwang-Hyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.10A
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    • pp.1756-1763
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    • 2001
  • In this paper, we propose an ATM-LAN IWU(interworking unit) with threshold based dynamic bandwidth allocation scheme. We analyze a discrete-time based finite queueing model with deterministic service times in order to investigate the performance of the proposed scheme. It is known that the arrival process of IP packets is bursty. So we use an MMPP(Markov Modulated Poisson Process) to model the bursty input traffic. As performance measures, we obtain the packet loss probability and the mean packet delay. We present some numerical results to show the effects of the thresholds on the performance of the DBAS(dynamic bandwidth allocation scheme).

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